For the first time, we have integrated strained germanium (s-Ge) channel PMOSFETs with conventional CMOS processes including shallow trench isolation (STI) and scaled thin gate dielectrics. The selectively formed thin s-Ge channels are realized on pre-patterned SiGe on insulator (SGOI) regions by local thermal mixing (TM) or selective UHVCVD process. The thinnest SiO/sub 2/ on the s-Ge is achieved by low temperature remote plasma oxidation of a thin Si cap. As a result, 3X drive current enhancement is demonstrated on the fabricated s-Ge channel PMOSFETs over the Si controls. In addition, an appropriate threshold voltage (Vth) is demonstrated on the HfO/sub 2//P+ poly Si gate PMOSFETs when using an s-Ge channel.