A provably good multilayer topological planar routing algorithm in IC layout designs

A provably good approximation algorithm for the multilayer topological planar routing problem is presented. The algorithm, called the iterative-peeling algorithm, finds a solution whose weight is guaranteed to be at least 1-(1/e) approximately=63.2% of the weight of an optimal solution. The algorithm works for multiterminal nets and arbitrary number of routing layers. For a fixed number of routing layers, even tighter performance bounds are used. In particular, the performance ratio of the iterative-peeling algorithm is at least 75% for two-layer routing and is at least 70.4% for three-layer routing. Experimental results confirm that the algorithm can always route a majority of the nets without using vias, even when the number of routing layers is fairly small. >

[1]  Malgorzata Marek-Sadowska An Unconstrained Topological Via Minimization Problem for Two-Layer Routing , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Jason Cong,et al.  On the k-layer planar subset and via minimization problems , 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..

[3]  Majid Sarrafzadeh,et al.  Algorithms for three-layer over-the-cell channel routing , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[4]  Akihiko Hanafusa,et al.  Three-dimensional routing for multilayer ceramic printed circuit boards , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[5]  Jason Cong,et al.  Over-the-cell channel routing , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Michael Burstein,et al.  Hierarchical Wire Routing , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[7]  Wayne Wei-Ming Dai,et al.  Rubber band routing and dynamic data representation , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[8]  Jason Cong,et al.  A fast four-via multilayer MCM router , 1993, Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93.

[9]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .

[10]  Kuo-Feng Liao,et al.  Planar subset of multi-terminal nets , 1990, Integr..

[11]  Alberto L. Sangiovanni-Vincentelli,et al.  MulCh: a multi-layer channel router using one, two, and three layer partitions , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[12]  Jason Cong,et al.  A new approach to three- or four-layer channel routing , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[13]  Toshinobu Kashiwabara,et al.  Exact algorithms for multilayer topological via minimization , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[14]  KENNETH J. SUPOWIT,et al.  Finding a Maximum Planar Subset of a Set of Nets in a Channel , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[15]  D. R. Barbour,et al.  Thermal conduction module: a high-performance multilayer ceramic package , 1982 .

[16]  Alberto L. Sangiovanni-Vincentelli,et al.  Chameleon: A New Multi-Layer Channel Router , 1986, 23rd ACM/IEEE Design Automation Conference.

[17]  Charles E. Leiserson,et al.  Algorithms for routing and testing routability of planar VLSI layouts , 1985, STOC '85.

[18]  Chak-Kuen Wong,et al.  Layer assignment for multichip modules , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[19]  Alberto Sangiovanni-Vincentelli,et al.  Chameleon: A New Multi-Layer Channel Router , 1986, DAC 1986.

[20]  David N. Deutsch A “DOGLEG” channel router , 1976, DAC 1976.

[21]  Jason Cong,et al.  A fast multilayer general area router for MCM designs , 1992, EURO-DAC '92.

[22]  P. Libby The Scientific American , 1881, Nature.

[23]  Takeshi Yoshimura,et al.  Efficient Algorithms for Channel Routing , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[24]  Majid Sarrafzadeh,et al.  New algorithm for over-the-cell channel routing using vacant terminals , 1991, 28th ACM/IEEE Design Automation Conference.

[25]  Majid Sarrafzadeh,et al.  A new approach to topological via minimization , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..