NAND Flash Memory: Challenges and Opportunities

NAND flash offers a range of compelling benefits that will keep attracting mobile and enterprise application developers as engineers tackle the hard problems of scaling the technology to sub-20 nm.

[1]  Tong Zhang,et al.  A First Study on Self-Healing Solid-State Drives , 2011, 2011 3rd IEEE International Memory Workshop (IMW).

[2]  Khanh Nguyen,et al.  A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[3]  Chilhee Chung,et al.  Endurance Prediction of Scaled NAND Flash Memory Based on Spatial Mapping of Erase Tunneling Current , 2011, 2011 3rd IEEE International Memory Workshop (IMW).

[4]  Kinam Kim,et al.  Degradation of tunnel oxide by FN current stress and its effects on data retention characteristics of 90 nm NAND flash memory cells , 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

[5]  Masahide Matsumoto,et al.  A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[6]  Yan Li,et al.  A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[7]  Eli Harari Flash memory — The great disruptor! , 2012, 2012 IEEE International Solid-State Circuits Conference.

[8]  Yan Li,et al.  128Gb 3b/cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode , 2012, 2012 IEEE International Solid-State Circuits Conference.

[9]  Gihyun Bae,et al.  Novel integration technologies for improving reliability in NAND flash memory , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[10]  Yan Li,et al.  A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[11]  Takashi Maeda,et al.  Multi-stacked 1G cell/layer Pipe-shaped BiCS flash memory , 2009, 2009 Symposium on VLSI Circuits.

[12]  Hwang Huh,et al.  A 64Gb NAND Flash Memory with 800MB/s Synchronous DDR Interface , 2012, 2012 4th IEEE International Memory Workshop.