An instruction-level functionality-based energy estimation model for 32-bits microprocessors

The paper presents a novel strategy aimed at modeling the instruction energy consumption of 32-bits microprocessors. The proposed znstmction-level power model is founded on a , fi~nctzonal decomposition of the activities accomplished by a generic microprocessor and exhibits significant generalization capabilities. It allows estimation of the power figures of the entire instruction-set starting from the analysis of a subset, as well as to power characterize new processors by using the model obtained by considering other microprocessors.