A hybrid NMOS/PMOS low-dropout regulator with fast transient response for SoC applications

In this paper, a new architecture of a fully integrated low-dropout voltage regulator (LDO) is presented. It is composed of hybrid architecture of NMOS/PMOS power transistors to relax stability requirements and enhance the transient response of the system. The LDO is designed in UMC 130 nm CMOS technology and is capable of producing a stable output voltage of 1.1 V from 1.3 V single supply with recovery settling time s 500 nsec. The LDO can supply current from 10 μA to 100 mA consuming quiescent current of 23.7 μA and 83.5 μA, respectively. The performance of the proposed technique is compared with other reported techniques and gives a better performance. It can support load capacitance from 0–50 pF with phase margin that increases from 47° at low load (10 μA) to 80° at high load (100 mA) and power supply rejection ratio (PSRR) less than −9 dB up to 1 MHz.

[1]  Chenchang Zhan,et al.  An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC , 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

[2]  Bertan Bakkaloglu,et al.  A 100-mA, 99.11% Current Efficiency, 2-mVpp Ripple Digitally Controlled LDO With Active Ripple Suppression , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  M. Pasotti,et al.  Power efficient charge pump in deep submicron standard CMOS technology , 2003, Proceedings of the 27th European Solid-State Circuits Conference.

[4]  Pak Kwong Chan,et al.  A 0.9-/spl mu/A Quiescent Current Output-Capacitorless LDO Regulator With Adaptive Power Transistors in 65-nm CMOS , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  K. Leung,et al.  A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation , 2003, IEEE J. Solid State Circuits.

[6]  Wing-Hung Ki,et al.  An NMOS-LDO Regulated Switched-Capacitor DC–DC Converter With Fast-Response Adaptive-Phase Digital Control , 2016, IEEE Transactions on Power Electronics.

[7]  Ramón González Carvajal,et al.  The flipped voltage follower: a useful cell for low-voltage low-power circuit design , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  Pui Ying Or,et al.  An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection , 2010, IEEE Journal of Solid-State Circuits.

[9]  Tsz Yin Man,et al.  A High Slew-Rate Push–Pull Output Amplifier for Low-Quiescent Current Low-Dropout Regulators With Transient-Response Improvement , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[10]  D.D. Buss.  Technology in the Internet age , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[11]  T. Karnik,et al.  Area-efficient linear regulator with ultra-fast load regulation , 2005, IEEE Journal of Solid-State Circuits.

[12]  José Silva-Martínez,et al.  External Capacitor-Less Low Drop-Out Regulator With 25 dB Superior Power Supply Rejection in the 0.4–4 MHz Range , 2014, IEEE Journal of Solid-State Circuits.