A 0.4 $\mu \text{g}$ Bias Instability and 1.2 $\mu \text{g}/\surd $ Hz Noise Floor MEMS Silicon Oscillating Accelerometer With CMOS Readout Circuit

This paper describes a silicon-on-insulator MEMS oscillating accelerometer with a fully differential CMOS continuous-time oscillation sustaining circuit and a digital frequency measurement circuit. To reduce the amplitude-stiffness-induced frequency variation, the effects of flicker noise in the automatic amplitude control circuit are classified into additive and multiplicative components, which are suppressed by chopper stabilization and tail current source free structures, respectively. A low-power digital frequency measurement circuit employing a time-domain <inline-formula> <tex-math notation="LaTeX">$\Sigma \Delta $ </tex-math></inline-formula> ADC is integrated on chip. The accelerometer achieves a bias instability of 0.4/2 <inline-formula> <tex-math notation="LaTeX">$\mu \text{g}$ </tex-math></inline-formula>, a bias stability of 4.13/13.2 <inline-formula> <tex-math notation="LaTeX">$\mu \text{g}$ </tex-math></inline-formula>, and a noise floor of 1.2/2.6 <inline-formula> <tex-math notation="LaTeX">$\mu \text{g} / \surd $ </tex-math></inline-formula>Hz, as measured from the analog/digital outputs, respectively, with a scale factor of 280 Hz/g and a full scale of ±20 g. The chip is fabricated in 0.35 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> standard CMOS technology, and consumes 4.37 mW under a 1.5 V supply.

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