Design and VLSI implementation of a real-time histogram generator

This paper presents the design and implementation, on a single VLSI chip, of a new high speed device performing histogram generation of video rate images. This high speed VLSI chip is designed to work at 13 MHz and will accommodate histograms of images of up to 682 pixels per horizontal line. The die size dimensions for the chip are 6·27 mm × 5·41 mm = 33·95 mm2. The chip is intended to be used as a part of machine vision systems in industrial pattern recognition, where the need for real-time processing is crucial, through threshold selection and acceleration of image processing algorithms based on histograms.

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