Study of lithography profiles developed on non-planar Si surfaces

A tested, verified, and calibrated lithography simulator, based on cellular automata, is used to study phenomena, the effects of which are becoming more pronounced as the integrated circuits (ICs) are pushed deeper into the nanometre region. Lithography profiles developed on non-planar Si surfaces, where a step or a sloped line is present, were studied. Numerical experiments that elucidate effects such as the resist surface roughness on the developed profiles, as well as the effect of defects located into the resist bulk, in the presence of non-planar Si surfaces, are also presented. These effects are expected to be more pronounced as the integrated circuits are pushed deeper into the nanometre region.

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