A Fully Implicit Algorithm for Exact State Minimization

State minimization of incompletely specified machines is an important step of FSM synthesis. An exact algorithm consists of generation of prime compatibles and solution of a binate covering problem. This paper presents an implicit algorithm for exact state minimization of FSM's. We describe how to do implicit prime computation and implicit binate covering. We show that we can handle sets of compatibles and prime compatibles of cardinality up to 2/sup 1500/. We present the first published algorithm for fully implicit exact binate covering. We show that we can reduce and solve binate tables with up to 10 /sup 6/ rows and columns. The entire branch-and-bound procedure is carried on implicitly. We indicate also where such examples arise in practice.

[1]  Robert K. Brayton,et al.  Input don't care sequences in FSM networks , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[2]  Fabio Somenzi,et al.  The role of prime compatibles in the minimization of finite state machines , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[3]  Olivier Coudert,et al.  A New Viewpoint on Two-Level Logic Minimization , 1993, 30th ACM/IEEE Design Automation Conference.

[4]  R. Bryant.  Graph-Based Algorithms for Boolean Function Manipulation12 , 1986 .

[5]  Olivier Coudert,et al.  Implicit and incremental computation of primes and essential primes of Boolean functions , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[6]  Robert K. Brayton,et al.  Solving the state assignment problem for signal transition graphs , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[7]  Olivier Coudert,et al.  Symbolic prime generation for multiple-valued functions , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[8]  Robert K. Brayton,et al.  An exact minimizer for Boolean relations , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[9]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[10]  Alberto Sangiovanni-Vincentelli,et al.  Logic synthesis for vlsi design , 1989 .

[11]  Frank Rubin.  Worst Case Bounds for Maximal Compatible Subsets , 1975, IEEE Transactions on Computers.

[12]  Fabrizio Luccio,et al.  A Method for Minimizing the Number of Internal States in Incompletely Specified Sequential Networks , 1965, IEEE Trans. Electron. Comput..

[13]  Robert K. Brayton,et al.  Implicit state enumeration of finite state machines using BDD's , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.