Implications ofProximity Effects forAnalog Design
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II. WellProximity Effect Thispaper addresses twosignificant proximity effects, well A.Background proximity andSTIstress, astheyrelate toanalog circuit Highly scaled bulkCMOS technologies makeuseofhigh design. Device performance isimpacted bylayout features energyimplants toformthedeepretrograde wellprofiles located near, butnotpartofthedevice. Thisaddsnewcom- neededforlatch-up protection andsuppression oflateral plexities toanalog design. Ineither case, bias points canshiftpunch-through [10]. During theimplant process, atomscan by20-30%, causing potentially catastrophic failures incircuits. - l scatter laterally fromtheedgeofthephotoresist maskand We show, forthefirst time, that aMOSFETplaced close toa becomeembedded inthesilicon surface inthevicinity ofthe well-edge creates agraded channel. welledge[5,8],asillustrated inFig. 1.Theresult isawell