Design-for-Test of Digitally-Assisted Analog IPs for Automotive SoCs

This paper presents a Design-for-Test approach for digitally-assisted analog IPs in automotive applications. It adopts an on-chip measurement architecture based on the IEEE 1500 Standard to deal with analog test. The architecture is modular-based and scalable, suitable for parametric DC and delay measurements, and capable of executing concurrent on-chip measurements. The design implementation is simple, and moderate measurement accuracies can be achieved. For accuracy enhancement, the on-chip obtained parametric data are shifted out for post processing to reduce measurement errors. The availability of parametric data on the ATE facilitates also the application of various outlier-screening methods for automotive products.

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