Destination tag routing techniques based on a state model for the LADM network
暂无分享,去创建一个
[1] Tse-Yun Feng,et al. Data Manipulating Functions in Parallel Processors and Their Implementations , 1974, IEEE Transactions on Computers.
[2] Cauligi S. Raghavendra,et al. The Gamma Network , 1984, IEEE Transactions on Computers.
[3] Kyungsook Y. Lee,et al. Control Algorithms for the Augmented Data Manipulator Network , 1986, ICPP.
[4] Cauligi S. Raghavendra,et al. The Gamma network: A multiprocessor interconnection network with redundant paths , 1982, ISCA 1982.
[5] Robert J. McMillen,et al. Routing Schemes for the Augmented Data Manipulator Network in an MIMD System , 1982, IEEE Transactions on Computers.
[6] Tse-Yun Feng,et al. The Reverse-Exchange Interconnection Network , 1980, IEEE Trans. Computers.
[7] Cauligi S. Raghavendra,et al. On Permutations Passable by the Gamma Network , 1986, J. Parallel Distributed Comput..
[8] Robert J. McMillen,et al. Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network , 1982, ISCA 1982.
[9] Marshall C. Pease,et al. The Indirect Binary n-Cube Microprocessor Array , 1977, IEEE Transactions on Computers.
[10] Robert J. McMillen,et al. The Multistage Cube: A Versatile Interconnection Network , 1981, Computer.
[11] Cauligi S. Raghavendra,et al. The Gamma network: A multiprocessor interconnection network with redundant paths , 1982, ISCA.
[12] Howard Jay Siegel,et al. Interconnection networks for large-scale parallel processing: theory and case studies (2nd ed.) , 1985 .
[13] Dharma P. Agrawal,et al. Graph Theoretical Analysis and Design of Multistage Interconnection Networks , 1983, IEEE Transactions on Computers.
[14] Howard Jay Siegel,et al. Study of multistage SIMD interconnection networks , 1978, ISCA '78.
[15] Duncan H. Lawrie,et al. A Class of Redundant Path Multistage Interconnection Networks , 1983, IEEE Transactions on Computers.
[16] Howard Jay Siegel,et al. A Fault-Tolerant Multistage Interconnection Network for Multiprocessor Systems Using Dynamic Redundancy , 1986, ICDCS.
[17] Janak H. Patel. Performance of Processor-Memory Interconnections for Multiprocessors , 1981, IEEE Transactions on Computers.
[18] Tse-Yun Feng,et al. On a Class of Multistage Interconnection Networks , 1980, IEEE Transactions on Computers.
[19] Duncan H. Lawrie,et al. Access and Alignment of Data in an Array Processor , 1975, IEEE Transactions on Computers.
[20] Robert J. McMillen,et al. Evaluation of cube and data manipulator networks , 1985, J. Parallel Distributed Comput..
[21] Howard Jay Siegel,et al. Destination tag routing techniques based on a state model for the LADM network , 1988, ISCA '88.