A 15-b 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration
暂无分享,去创建一个
[1] P. R. Gray,et al. A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter , 1999, IEEE J. Solid State Circuits.
[2] Wenhua Yang,et al. A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input , 2001, IEEE J. Solid State Circuits.
[3] Un-Ku Moon,et al. Background calibration techniques for multistage pipelined ADCs with digital redundancy , 2003, IEEE Trans. Circuits Syst. II Express Briefs.
[4] Randall L. Geiger,et al. An architecture and an algorithm for fully digital correction of monolithic pipelined ADCs , 1995 .
[5] I. Galton,et al. A digitally enhanced 1.8 V 15 b 40 MS/s CMOS pipelined ADC , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[6] Bang-Sup Song,et al. Digital-domain calibration of multistep analog-to-digital converters , 1992 .
[7] M. F. Tompsett,et al. A 10-b 15-MHz CMOS recycling two-step A/D converter , 1990 .
[8] Ian Galton,et al. Gain error correction technique for pipelined analogue-to-digital converters , 2000 .
[9] L. R. Carley,et al. An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC , 1995 .
[10] Andreas Kaiser,et al. Input switch configuration suitable for rail-to-rail operation of switched-opamp circuits , 1999 .
[11] M. K. Mayes,et al. A 200 mW, 1 Msample/s, 16-b pipelined A/D converter with on-chip 32-b microcontroller , 1996 .
[12] C.A. Laber,et al. A family of differential NMOS analog circuits for a PCM codec filter chip , 1982, IEEE Journal of Solid-State Circuits.
[13] K. Nair,et al. A 96 dB SFDR 50 MS/s digitally enhanced CMOS pipeline A/D converter , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[14] Hung-Chih Liu,et al. A digital background calibration technique for pipelined analog-to-digital converters , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..
[15] B.K. Ahuja,et al. An improved frequency compensation technique for CMOS operational amplifiers , 1983, IEEE Journal of Solid-State Circuits.
[16] Paul R. Gray,et al. A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS , 1991 .
[17] Ian Galton. Digital cancellation of D/A converter noise in pipelined A/D converters , 2000 .
[18] Hung-Chih Liu,et al. A 15 b 20 MS/s CMOS pipelined ADC with digital background calibration , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[19] I. Mehr,et al. A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC , 2000 .
[20] J. Huijsing,et al. Design of low-voltage, low-power operational amplifier cells , 1996 .
[21] A. Karanicolas,et al. A 15-b 1-Msample/s digitally self-calibrated pipeline ADC , 1993 .
[22] Hae-Seung Lee. A 12-b 600 ks/s digitally self-calibrated pipelined algorithmic ADC , 1994 .
[23] M. A. Copeland,et al. Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range , 1984 .
[24] Stephen H. Lewis,et al. Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.
[25] I. Opris,et al. A single-ended 12 b 20 M sample/s self-calibrating pipeline A/D converter , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).
[26] S. H. Lewis,et al. An 8-bit 80-Msample/s pipelined analog-to-digital converter with background calibration , 2001 .
[27] T. L. Sculley,et al. A digitally self-calibrating 14-bit 10-MHz CMOS pipelined A/D converter , 2002 .
[28] Bang-Sup Song,et al. A 15 b 5 MSample/s low-spurious CMOS ADC , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.
[29] Bang-Sup Song,et al. A 14 b-linear capacitor self-trimming pipelined ADC , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[30] B. Murmann,et al. A 12 b 75 MS/s pipelined ADC using open-loop residue amplification , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..