An Adaptive-Rate Error Correction Scheme for NAND Flash Memory

ECC has been widely used to enhance flash memory endurance and reliability. In this work, we propose an adaptive-rate ECC scheme with BCH codes that is implemented on the flash memory controller. With this scheme, flash memory can trade storage space for higher error correction capability to keep it usable even when there is a high noise level.

[1]  Robert T. Chien,et al.  Cyclic decoding procedures for Bose- Chaudhuri-Hocquenghem codes , 1964, IEEE Trans. Inf. Theory.

[2]  Shu Lin,et al.  Error control coding : fundamentals and applications , 1983 .

[3]  Roberto Ravasio,et al.  An overview of logic architectures inside flash memory devices , 2003 .

[4]  Keshab K. Parhi,et al.  Small area parallel Chien search architectures for long BCH codes , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]  Jen-Chieh Yeh,et al.  Flash memory built-in self-diagnosis with test mode control , 2005, 23rd IEEE VLSI Test Symposium (VTS'05).

[6]  Wonyong Sung,et al.  Strength-Reduced Parallel Chien Search Architecture for Strong BCH Codes , 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

[7]  James L. Massey,et al.  Shift-register synthesis and BCH decoding , 1969, IEEE Trans. Inf. Theory.

[8]  Luca Crippa,et al.  A 4Gb 2b/cell NAND Flash Memory with Embedded 5b BCH ECC for 36MB/s System Read Throughput , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[9]  Cheng-Wen Wu,et al.  A built-in self-repair scheme for NOR-type flash memory , 2006, 24th IEEE VLSI Test Symposium.

[10]  Guido Torelli,et al.  On-chip error correcting techniques for new-generation flash memories , 2003, Proc. IEEE.

[11]  T. Moon Error Correction Coding: Mathematical Methods and Algorithms , 2005 .

[12]  X. Youzhi Implementation of Berlekamp-Massey algorithm without inversion , 1991 .

[13]  Jen-Chieh Yeh,et al.  Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.