An improved aging-predict scheme based on symmetrical nor gate

Transistor aging has become the most important factor affecting the integrated circuit reliability. There is detection error caused by stacking effect in the stability checker in the previous respective aging sensors. An improved prediction aging sensor scheme is proposed using symmetrical NOR gate. Simulation experiments show the improved method eliminates prediction error caused by stacking effect. Layout area overhead is 4.65% and 7.06% compared to two respective sensor structures.

[1]  B.C. Paul,et al.  Impact of NBTI on the temporal performance degradation of digital circuits , 2005, IEEE Electron Device Letters.

[2]  Yu Cao,et al.  The Impact of NBTI on the Performance of Combinational and Sequential Circuits , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[3]  Xiaowei Li,et al.  A unified online Fault Detection scheme via checking of Stability Violation , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[4]  Yu Cao,et al.  Compact Modeling and Simulation of Circuit Reliability for 65-nm CMOS Technology , 2007, IEEE Transactions on Device and Materials Reliability.

[5]  João Paulo Teixeira,et al.  Low-sensitivity to process variations aging sensor for automotive safety-critical applications , 2010, 2010 28th VLSI Test Symposium (VTS).

[6]  I. C. Teixeira,et al.  On-line BIST for performance failure prediction under aging effects in automotive safety-critical applications , 2011, 2011 12th Latin American Test Workshop (LATW).

[7]  Sani R. Nassif,et al.  High Performance CMOS Variability in the 65nm Regime and Beyond , 2007 .

[8]  Ming Zhang,et al.  Circuit Failure Prediction and Its Application to Transistor Aging , 2007, 25th IEEE VLSI Test Symposium (VTS'07).

[9]  João Paulo Teixeira,et al.  Built-in aging monitoring for safety-critical applications , 2009, 2009 15th IEEE International On-Line Testing Symposium.

[10]  Huaguo Liang,et al.  A fault detection sensor for circuit aging using double-edge-triggered flip-flop , 2013 .

[11]  João Paulo Teixeira,et al.  Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors , 2011, 29th VLSI Test Symposium.