Design and implementation of true random number generators based on semiconductor superlattice chaos

Abstract True random number generator (TRNG) is of the fundamental guarantees of information security. However, the commercially-available all-electronic TRNGs, no matter whether the thermal-noise-based or the oscillator-based ones, can merely reach the speed of a few Mbit/s due to the very limited entropy source, which is unable to meet the requirements of ultra-high-speed and ultra-large capacity of information propagation or storage. This paper proposes the design and implementation of semiconductor superlattice random number generator (SSL-RNG) by employing semiconductor superlattice chaos as entropy source. We introduce the entropy estimation method to evaluate the raw data from the entropy harvester quantitatively, thus optimized the parameter design of the LFSR-Toeplitz extractor for post-processing. We have also integrated the entropy acquisition circuit into an embedded FPGA-based platform as a standalone design to trade off the performance and cost. The resulting hardware's output passes the NIST standard statistical test with a full entropy throughput above 300 Mbit/s.