EUVL printing results of a low-thermal expansion material (LTEM) mask

Minimizing image placement errors due to thermal distortion of the mask is a key requirement for qualifying EUV Lithography as a Next Generation Lithography (NGL). Employing Low Thermal Expansion Materials (LTEMs) for mask substrates is a viable solution for controlling mask thermal distortion and is being investigated by a wide array of researchers, tool makers, photomask suppliers, and material manufacturers. Finite element modeling has shown that an EUVL mask with a Coefficient of Thermal Expansion (CTE) of less than 20 ppb/K will meet overlay error budgets for <EQ 70 nm lithography at a throughput of 80 wafers per hour. In this paper, we describe the functional differences between today's photomask and EUVL masks; some of these differences are EUVL specific, while others are natural consequences of the shrinking critical dimension. We demonstrate that a feasible manufacturing pathway exists for Low Thermal Expansion Material (LTEM) EUVL masks by fabricating a wafer-shaped LTEM mask substrate using the same manufacturing steps as for fabricating Si wafers. The LTEM substrate was then coated with Mo/Si multilayers, patterned, and printed using the 10X Microstepper. The images were essentially indistinguishable from those images acquired from masks fabricated from high quality silicon wafers as substrates. Our observations lend further evidence that an LTEM can be used as the EUVL mask substrate material.