Optimized design of decimator for alias removal in multirate DSP applications

Decimator is an important sampling device used for multi-rate signal processing in wireless communication systems. In this paper optimized decimator has been presented to improve the implementation complexity. The proposed decimator is implemented using Matlab as standard FIR, Half Band FIR and Nyquist FIR by using the multistage design techniques. The performance of different decimator designs is compared in terms of error and hardware requirements. The results show that the performance of all designs is almost identical but their implementation cost varies greatly in terms of hardware requirements. The hardware saving of 49% to 84% can be achieved by using multistage Nyquist decimator design.

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