FPGA 환경에서 SIFT 알고리즘의 처리 속도 향상을 위한 하드웨어 설계

SIFT is an algorithm to extract feature points of an object desired to recognize. The extracted feature points are located in a part of vertices and edges of the object. The algorithm is primarily used in many image processing systems, such as object recognition, image panorama, and image restoration. Since the algorithm needs a huge amount of computations, it is hard to achieve a real time performance even in a small sized image. In this paper, we propose a new hardware architecture which can extract feature points out of 640×480 sized input image in real time. The hardware utilizes maximum degree of parallelism of the algorithm. The proposed architecture spends 25ms to process a VGA(640×480) image frame (or 40 frames/sec), which is sufficient for real time processing. Required memory is 675Kb internal SRAM and 2.5Mb external DRAM.