Modeling and evaluation of substrate noise induced by interconnects
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[1] G. Gonzalez. Microwave Transistor Amplifiers: Analysis and Design , 1984 .
[2] Tughrul Arslan,et al. Proceedings Design, Automation and Test in Europe Conference and Exhibition , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[3] J. Ackermann,et al. Analysis and Design , 1993 .
[4] Maher Kayal,et al. LAYIN: toward a global solution for parasitic coupling modeling and visualization , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.
[5] T. Sakurai,et al. Approximation of wiring delay in MOSFET LSI , 1983, IEEE Journal of Solid-State Circuits.
[6] Miquel Roca,et al. Inductance in VLSI interconnection modelling , 1998 .
[7] Robert G. Meyer,et al. Modeling and analysis of substrate coupling in integrated circuits , 1996 .
[8] Michael B. Steer,et al. Foundations of Interconnect and Microstrip Design , 2000 .
[9] Raminderpal Singh. Principles of Substrate Crosstalk Generation in CMOS Circuits , 2002 .
[10] David J. Allstot,et al. Verification techniques for substrate coupling and their application to mixed-signal IC design , 1996 .
[11] Xavier Aragones,et al. Experimental comparison of substrate noise coupling using different wafer types , 1999 .