A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit
暂无分享,去创建一个
M. Prezioso | B. Hoskins | B. Chakrabarti | M. A. Lastras-Montaño | G. Adam | K.-T. Cheng | M. Payvand | A. Madhavan | A. Ghofrani | L. Theogarajan | D. B. Strukov | B. Chakrabarti | D. Strukov | B. Hoskins | A. Madhavan | M. Prezioso | G. Adam | M. Payvand | A. Ghofrani | M. Lastras-Montaño | Luke Theogarajan | Kwang-Ting Cheng
[1] Thomas G. Bifano,et al. Planarization of a CMOS die for an integrated metal MEMS , 2003, SPIE MOEMS-MEMS.
[2] Amirali Ghofrani,et al. Architecting energy efficient crossbar-based memristive random-access memories , 2015, Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15).
[3] Yu Wang,et al. Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication , 2015, Journal of Computer Science and Technology.
[4] Warren Robinett,et al. Memristor-CMOS hybrid integrated circuits for reconfigurable logic. , 2009, Nano letters.
[5] Dmitri B Strukov,et al. Four-dimensional address topology for circuits with stacked multilayer crossbar arrays , 2009, Proceedings of the National Academy of Sciences.
[6] S. Burc Eryilmaz,et al. Four-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processing , 2016, 2016 IEEE Symposium on VLSI Technology.
[7] Catherine Graves,et al. Dot-product engine for neuromorphic computing: Programming 1T1M crossbar to accelerate matrix-vector multiplication , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[8] J. Yang,et al. A Family of Electronically Reconfigurable Nanodevices , 2009 .
[9] D. Strukov,et al. Prospects for terabit-scale nanoelectronic memories , 2004 .
[10] Frederick T. Chen,et al. Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).
[11] E. Lehtonen,et al. Arithmetic operations within memristor-based analog memory , 2010, 2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010).
[12] Luke Theogarajan,et al. A configurable CMOS memory platform for 3D-integrated memristors , 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).
[13] Kinam Kim,et al. Bi-layered RRAM with unlimited endurance and extremely uniform switching , 2011, 2011 Symposium on VLSI Technology - Digest of Technical Papers.
[14] U-In Chung,et al. Multi-level switching of triple-layered TaOx RRAM with excellent reliability for storage class memory , 2012, 2012 Symposium on VLSI Technology (VLSIT).
[15] Konstantin K. Likharev,et al. Neuromorphic CMOL circuits , 2003, 2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003..
[16] Farnood Merrikh-Bayat,et al. Training and operation of an integrated neuromorphic network based on metal-oxide memristors , 2014, Nature.
[17] Wei Yang Lu,et al. Nanoscale memristor device as synapse in neuromorphic systems. , 2010, Nano letters.
[18] Jiantao Zhou,et al. Stochastic Memristive Devices for Computing and Neuromorphic Applications , 2013, Nanoscale.
[19] Chung-Wei Hsu,et al. 3D vertical TaOx/TiO2 RRAM with over 103 self-rectifying ratio and sub-μA operating current , 2013, 2013 IEEE International Electron Devices Meeting.
[20] Narayan Srinivasa,et al. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. , 2012, Nano letters.
[21] Heng-Yuan Lee,et al. A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme , 2009, 2009 Symposium on VLSI Circuits.
[22] Shimeng Yu,et al. An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation , 2011, IEEE Transactions on Electron Devices.
[23] Derek Abbott,et al. Memristive crypto primitive for building highly secure physical unclonable functions , 2015, Scientific Reports.
[24] Kyungmin Kim,et al. Memristor Applications for Programmable Analog ICs , 2011, IEEE Transactions on Nanotechnology.
[25] Qiangfei Xia,et al. 3D integration of planar crossbar memristive devices with CMOS substrate , 2014, Nanotechnology.
[26] O. Richard,et al. 10×10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation , 2011, 2011 International Electron Devices Meeting.
[27] Heng-Yuan Lee,et al. A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability , 2011, 2011 IEEE International Solid-State Circuits Conference.
[28] D. B. Strukov,et al. Programmable CMOS/Memristor Threshold Logic , 2013, IEEE Transactions on Nanotechnology.
[29] Farnood Merrikh-Bayat,et al. Memristor-based circuits for performing basic arithmetic operations , 2010, WCIT.
[30] Farnood Merrikh-Bayat,et al. Highly-uniform multi-layer ReRAM crossbar circuits , 2016, 2016 46th European Solid-State Device Research Conference (ESSDERC).
[31] Yiran Chen,et al. Vortex: Variation-aware training for memristor X-bar , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[32] J Joshua Yang,et al. Memristive devices for computing. , 2013, Nature nanotechnology.