Lawrence T. Pileggi

发表

A quadratic metric with a simple solution scheme for initial placement

Lawrence T. Pileggi, Ronald A. Rohrer, 1988, DAC '88.

Linear load model for robust power system analysis

Hyun Ah Song, Christos Faloutsos, Lawrence T. Pileggi, 2017, 2017 IEEE PES Innovative Smart Grid Technologies Conference Europe (ISGT-Europe).

IC analyses including extracted inductance models

Lawrence T. Pileggi, Michael W. Beattie, 1999, DAC '99.

Power comparison of throughput optimized IC busses

Lawrence T. Pileggi, E. Malley, A. Salinas, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Creating an affordable 22nm node using design-lithography co-optimization

Andrzej J. Strojwas, Lawrence T. Pileggi, Tejas Jhaveri, 2009, 2009 46th ACM/IEEE Design Automation Conference.

An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules

Lawrence T. Pileggi, S. Y. Kim, Emre Tuncer, 1993, ICCAD.

A 0.6-to-1V inverter-based 5-bit flash ADC in 90nm digital CMOS

Lawrence T. Pileggi, Jonathan Proesel, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Efficient Final Placement Based on Nets-as-points

Lawrence T. Pileggi, Ronald A. Rohrer, Xueqing Zhang, 1989, 26th ACM/IEEE Design Automation Conference.

Re-thinking polynomial optimization: Efficient programming of reconfigurable radio frequency (RF) systems by convexification

Lawrence T. Pileggi, Xin Li, Tamal Mukherjee, 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

An analysis of the wire-load model uncertainty problem

Salil Raje, Lawrence T. Pileggi, Padmini Gopalakrishnan, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Window-based susceptance models for large-scale RLC circuit analyses

Lawrence T. Pileggi, Michael W. Beattie, Hui Zheng, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Extended statistical element selection: A calibration method for high resolution in analog/RF designs

Lawrence T. Pileggi, Renzhi Liu, Jeffrey A. Weldon, 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Statistical Performance Modeling and Optimization

Xin Li, Lawrence T. Pileggi, Jiayong Le, 2007, Found. Trends Electron. Des. Autom..

OTTER: Optimal Termination of Transmission lines Excluding Radiation

Lawrence T. Pileggi, Rohini Gupta, 1994, 31st Design Automation Conference.

A sequential quadratic programming approach to concurrent gate and wire sizing

Ross Baldick, Lawrence T. Pileggi, Noel Menezes, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

AWEsim: Asymptotic Waveform Evaluation for Timing Analysis

Lawrence T. Pileggi, Ronald A. Rohrer, Xueqing Huang, 1989, 26th ACM/IEEE Design Automation Conference.

OPERA: optimization with ellipsoidal uncertainty for robust analog IC design

Stephen P. Boyd, Xin Li, Yang Xu, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Practical considerations for passive reduction of RLC circuits

Lawrence T. Pileggi, Altan Odabasioglu, Mustafa Celik, 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

PowerCast: Mining and Forecasting Power Grid Sequences

Hyun Ah Song, Christos Faloutsos, Lawrence T. Pileggi, 2017, ECML/PKDD.

Formal verification of phase-locked loops using reachability analysis and continuization

Matthias Althoff, Bruce H. Krogh, Lawrence T. Pileggi, 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

TETA: transistor-level waveform evaluation for timing analysis

Lawrence T. Pileggi, Emrah Acar, Florentin Dartu, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A frequency relaxation approach for analog/RF system-level simulation

Xin Li, Yang Xu, Lawrence T. Pileggi, 2004, Proceedings. 41st Design Automation Conference, 2004..

Exploring logic block granularity for regular fabrics

Lawrence T. Pileggi, Padmini Gopalakrishnan, Aneesh Koorapaty, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

An architectural exploration of via patterned gate arrays

Lawrence T. Pileggi, Herman Schmit, Chetan Patel, 2003, ISPD '03.

Robust Analog/RF Circuit Design With Projection-Based Performance Modeling

Xin Li, Yang Xu, Lawrence T. Pileggi, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A synthesis methodology for application-specific logic-in-memory designs

Franz Franchetti, Lawrence T. Pileggi, Kaushik Vaidyanathan, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Aggregated load and generation equivalent circuit models with semi-empirical data fitting

Gabriela Hug, Xin Li, Lawrence T. Pileggi, 2016, 2016 IEEE Green Energy and Systems Conference (IGSEC).

Quadratic Statistical $MAX$ Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits

Lawrence T. Pileggi, Xin Li, Yaping Zhan, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Mismatch analysis and statistical design at 65 nm and below

Lawrence T. Pileggi, Ken Mai, Xin Li, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware

Franz Franchetti, Lawrence T. Pileggi, Tobias Graf, 2013, 2013 IEEE High Performance Extreme Computing Conference (HPEC).

Design Automation Framework for Application-Specific Logic-in-Memory Blocks

Franz Franchetti, Mark Horowitz, Lawrence T. Pileggi, 2012, 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors.

RC-interconnect macromodels for timing simulation

Lawrence T. Pileggi, Florentin Dartu, Bogdan Tutuianu, 1996, DAC '96.

Indirect phase noise sensing for self-healing voltage controlled oscillators

Lawrence T. Pileggi, Xin Li, Soner Yaldiz, 2011, 2011 IEEE Custom Integrated Circuits Conference (CICC).

An RRAM-based Oscillatory Neural Network

James A. Bain, Lawrence T. Pileggi, Abhishek A. Sharma, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion

Jean-Olivier Plouchart, Alberto Valdes-Garcia, Bodhisatwa Sadhu, 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.

Performance-centering optimization for system-level analog design exploration

Jian Wang, Lawrence T. Pileggi, Xin Li, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Exploring regular fabrics to optimize the performance-cost trade-off

Andrzej J. Strojwas, Lawrence T. Pileggi, Herman Schmit, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

Throughput-driven IC communication fabric synthesis

Tao Lin, Lawrence T. Pileggi, L. Pileggi, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

A sequential quadratic programming approach to concurrent gate and wire sizing

Ross Baldick, Lawrence T. Pileggi, Noel Menezes, 1995, ICCAD.

Improving power flow robustness via circuit simulation methods

Gabriela Hug, Lawrence T. Pileggi, Marko Jereminov, 2017, 2017 IEEE Power & Energy Society General Meeting.

Energy-Efficient Abundant-Data Computing: The N3XT 1,000x

Kunle Olukotun, Franz Franchetti, Jan M. Rabaey, 2015, Computer.

On the efficacy of simplified 2D on-chip inductance models

Tao Lin, Lawrence T. Pileggi, Michael W. Beattie, 2002, DAC '02.

Robust Convergence of Power Flow Using TX Stepping Method with Equivalent Circuit Formulation

Gabriela Hug, Lawrence T. Pileggi, Marko Jereminov, 2018, 2018 Power Systems Computation Conference (PSCC).

PRIMO: probability interpretation of moments for delay calculation

Lawrence T. Pileggi, Rony Kay, L. Pileggi, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Understanding and addressing the impact of wiring congestion during technology mapping

Davide Pandini, Andrzej J. Strojwas, Lawrence T. Pileggi, 2002, ISPD '02.

Efficient statistical analysis of read timing failures in SRAM circuits

Umut Arslan, Lawrence T. Pileggi, Xin Li, 2009, 2009 10th International Symposium on Quality Electronic Design.

Domain characterization of transmission line models and analyses

Lawrence T. Pileggi, Rohini Gupta, Seok-Yoon Kim, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

SPIE: sparse partial inductance extraction

Lawrence T. Pileggi, Mustafa Celik, Zhijiang He, 1997, DAC.

Domain characterization of transmission line models for efficient simulation

Lawrence T. Pileggi, Rohini Gupta, Seok-Yoon Kim, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

A wideband RF receiver with extended statistical element selection based harmonic rejection calibration

Lawrence T. Pileggi, Renzhi Liu, Jeffrey A. Weldon, 2016, Integr..

A hierarchical decomposition methodology for multistage clock circuits

Rob A. Rutenbar, Lawrence T. Pileggi, Gary Ellis, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Correlation-aware statistical timing analysis with non-Gaussian delay distributions

Andrzej J. Strojwas, Lawrence T. Pileggi, Xin Li, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Session details: Nanometer Design: What Hurts Next...?

Lawrence T. Pileggi, 2002, DAC '02.

Temperature-dependent optimization of cache leakage power dissipation

Yangdong Deng, Lawrence T. Pileggi, Peng Li, 2005, 2005 International Conference on Computer Design.

GridWatch: Sensor Placement and Anomaly Detection in the Electrical Grid

Hyun Ah Song, Christos Faloutsos, Lawrence T. Pileggi, 2018, ECML/PKDD.

Robust Probabilistic Analysis of Transmission Power Systems based on Equivalent Circuit Formulation

Lawrence T. Pileggi, Marko Jereminov, Amritanshu Pandey, 2018, 2018 IEEE International Conference on Probabilistic Methods Applied to Power Systems (PMAPS).

Throughput-driven IC communication fabric synthesis

Lawrence T. Pileggi, Tao Lin, 2002, ICCAD 2002.

Constrained multivariable optimization of transmission lines with general topologies

Lawrence T. Pileggi, Rohini Gupta, 1995, ICCAD.

Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets

Lawrence T. Pileggi, Noel Menezes, Satyamurthy Pullela, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A wideband RF receiver with >80 dB harmonic rejection ratio

Lawrence T. Pileggi, Renzhi Liu, Jeffrey A. Weldon, 2014, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference.

Modeling the "Effective capacitance" for the RC interconnect of CMOS gates

Lawrence T. Pileggi, Satyamurthy Pullela, Jessica Qian, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Statistical design and optimization for adaptive post-silicon tuning of MEMS filters

Lawrence T. Pileggi, Xin Li, Tamal Mukherjee, 2012, DAC Design Automation Conference 2012.

A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing

Aydin Babakhani, Jean-Olivier Plouchart, Alberto Valdes-Garcia, 2013, IEEE Journal of Solid-State Circuits.

Efficient harmonic balance simulation using multi-level frequency decomposition

Lawrence T. Pileggi, Peng Li, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization

Brian Taylor, Lawrence T. Pileggi, Xin Li, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV

Tze Meng Low, Franz Franchetti, James C. Hoe, 2018, 2018 IEEE High Performance extreme Computing Conference (HPEC).

A linear-centric modeling approach to harmonic balance analysis

Lawrence T. Pileggi, Peng Li, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations

Lawrence T. Pileggi, Xin Li, Peng Li, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

A power aware system level interconnect design methodology for latency-insensitive systems

Lawrence T. Pileggi, Herman Schmit, Vikas Chandra, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

Enhancing the stability of asymptotic waveform evaluation for digital interconnect circuit applications

Lawrence T. Pileggi, Seok-Yoon Kim, Nanda Gopal, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation

Franz Franchetti, Lawrence T. Pileggi, Christian R. Berger, 2013, J. Signal Process. Syst..

Building trusted ICs using split fabrication

Lawrence T. Pileggi, Renzhi Liu, Kaushik Vaidyanathan, 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Equipotential shells for efficient inductance extraction

Lawrence T. Pileggi, Michael W. Beattie, Byron Krauter, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Evaluation by Parts of Mixed-Level DC-Connected Components in Logic Simulation

Lawrence T. Pileggi, Joseph T. Rahmeh, Dah-Cherng Yuan, 1993, 30th ACM/IEEE Design Automation Conference.

Joint invariant estimation of RF impairments for reconfigurable Radio Frequency(RF) front-end

Lawrence T. Pileggi, Xin Li, Jun Tao, 2014, 2014 IEEE Globecom Workshops (GC Wkshps).

Robust Online Simulation Framework for Grid Restoration Under Loss of SCADA pdf

Lawrence T. Pileggi, Marko Jereminov, Amritanshu Pandey, 2019, ArXiv.

TACO: timing analysis with COupling

Lawrence T. Pileggi, Ravishankar Arunachalam, Karthik Rajagopal, 2000, Proceedings 37th Design Automation Conference.

Configurable Analog And Radio Frequency Integrated Circuits

Yang Xu, Lawrence T. Pileggi, 2008 .

S2P: a stable 2-pole RC delay and coupling noise metric [IC interconnects]

Lawrence T. Pileggi, Emrah Acar, Altan Odabasioglu, 1999, Proceedings Ninth Great Lakes Symposium on VLSI.

mLogic: Ultra-low voltage non-volatile logic circuits using STT-MTJ devices

Lawrence T. Pileggi, David M. Bromberg, Daniel Morris, 2012, DAC Design Automation Conference 2012.

Asymptotic Probability Extraction for Nonnormal Performance Distributions

Lawrence T. Pileggi, Xin Li, Padmini Gopalakrishnan, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Robust Steady State Analysis of the Power Grid pdf

Gabriela Hug, Lawrence T. Pileggi, Marko Jereminov, 2018, ArXiv.

Coping with RC(L) interconnect design headaches

Lawrence T. Pileggi, 1995, ICCAD.

Electromagnetic parasitic extraction via a multipole method with hierarchical refinement

Lawrence T. Pileggi, Michael W. Beattie, 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

Assessment of true worst case circuit performance under interconnect parameter variations

Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

A 125 MS/s 10.4 ENOB 10.1 fJ/Conv-Step Multi-Comparator SAR ADC with Comparator Noise Scaling in 65nm CMOS

Lawrence T. Pileggi, Jeyanandh Paramesh, Shaolong Liu, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

Determination of worst-case aggressor alignment for delay calculation

Lawrence T. Pileggi, Ravishankar Arunachalam, Paul D. Gross, 1998, ICCAD.

Error bounds for capacitance extraction via window techniques

Lawrence T. Pileggi, Michael W. Beattie, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

False coupling interactions in static timing analysis

Lawrence T. Pileggi, R. D. Blanton, Ravishankar Arunachalam, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response

Tao Lin, Lawrence T. Pileggi, Emrah Acar, 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

PRIMA: passive reduced-order interconnect macromodeling algorithm

Lawrence T. Pileggi, Altan Odabasioglu, Mustafa Celik, 1997, ICCAD 1997.

Bounds for BEM capacitance extraction

Lawrence T. Pileggi, Michael W. Beattie, 1997, DAC.

RC(L) interconnect sizing with second order considerations via posynomial programming

Tao Lin, Lawrence T. Pileggi, 2001, ISPD '01.

Performance computation for precharacterized CMOS gates with RC loads

Lawrence T. Pileggi, Noel Menezes, Florentin Dartu, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Efficient full-chip thermal modeling and analysis

Lawrence T. Pileggi, Peng Li, Mehdi Asheghi, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

An Oscillatory Neural Network with Programmable Resistive Synapses in 28 Nm CMOS

Samuel Nascimento Pagliarini, Lawrence T. Pileggi, Thomas C. Jackson, 2018, 2018 IEEE International Conference on Rebooting Computing (ICRC).

Robust and passive model order reduction for circuits containing susceptance elements

Lawrence T. Pileggi, Hui Zheng, 2002, ICCAD 2002.

EWA: exact wiring-sizing algorithm

Lawrence T. Pileggi, Rony Kay, Gennady Bucheuv, 1997, ISPD '97.

Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations

Lawrence T. Pileggi, Xin Li, Jiayong Le, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings

Andrzej J. Strojwas, Lawrence T. Pileggi, Tejas Jhaveri, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

PRIMA: passive reduced-order interconnect macromodeling algorithm

Lawrence T. Pileggi, Altan Odabasioglu, Mustafa Celik, 1998, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Asymptotic waveform evaluation for timing analysis

Lawrence T. Pileggi, Ronald A. Rohrer, L. Pileggi, 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

StreamCast: Fast and Online Mining of Power Grid Time Sequences

Hyun Ah Song, Christos Faloutsos, Lawrence T. Pileggi, 2018, SDM.

Impact of interconnect variations on the clock skew of a gigahertz microprocessor

Ying Liu, Sani R. Nassif, Andrzej J. Strojwas, 2000, DAC.

A fast simulation approach for inductive effects of VLSI interconnects

Lawrence T. Pileggi, Xiaodong Yang, Sangwoo Kim, 2003, GLSVLSI '03.

RICE: rapid interconnect circuit evaluator

Lawrence T. Pileggi, Nanda Gopal, Curtis L. Ratzlaff, 1991, 28th ACM/IEEE Design Automation Conference.

TETA: transistor-level engine for timing analysis

Lawrence T. Pileggi, Florentin Dartu, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Robust analog/RF circuit design with projection-based posynomial modeling

Xin Li, Yang Xu, Lawrence T. Pileggi, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

The Elmore delay as a bound for RC trees with generalized input signals

Lawrence T. Pileggi, Rohini Gupta, Bogdan Tutuianu, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Bounding the efforts on congestion optimization for physical synthesis

Davide Pandini, Andrzej J. Strojwas, Lawrence T. Pileggi, 2003, GLSVLSI '03.

Regular Analog/RF Integrated Circuits Design Using Optimization With Recourse Including Ellipsoidal Uncertainty

Stephen P. Boyd, Xin Li, Yang Xu, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations

Lawrence T. Pileggi, Xin Li, Jiayong Le, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Clustering and load balancing for buffered clock tree synthesis

Lawrence T. Pileggi, Noel Menezes, Martin D. F. Wong, 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

Polar format synthetic aperture radar in energy efficient application-specific logic-in-memory

Franz Franchetti, Lawrence T. Pileggi, Christian R. Berger, 2012, 2012 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Variation-tolerant SRAM sense-amplifier timing using configurable replica bitlines

Umut Arslan, Lawrence T. Pileggi, Ken Mai, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Analytic termination metrics for pin-to-pin lossy transmission lines with nonlinear drivers

Lawrence T. Pileggi, Rohini Gupta, John Willis, 1998, IEEE Trans. Very Large Scale Integr. Syst..

A Gate-Delay Model for High-Speed CMOS Circuits

Lawrence T. Pileggi, Noel Menezes, Florentin Dartu, 1994, 31st Design Automation Conference.

Transmission Line Synthesis

Lawrence T. Pileggi, Rohini Gupta, Byron Krauter, 1995, 32nd Design Automation Conference.

A Smart Memory Accelerated Computed Tomography Parallel Backprojection

Franz Franchetti, Lawrence T. Pileggi, Qiuling Zhu, 2012, VLSI-SoC.

Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS

Rob A. Rutenbar, Yu Cao, Kenneth L. Shepard, 2008, Proceedings of the IEEE.

A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing

Franz Franchetti, James C. Hoe, Lawrence T. Pileggi, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Efficient and secure intellectual property (IP) design with split fabrication

Franz Franchetti, Lawrence T. Pileggi, Renzhi Liu, 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Active On-Die Suppression of Power Supply Noise

Lawrence T. Pileggi, Xin Li, Gökçe Keskin, 2006, IEEE Custom Integrated Circuits Conference 2006.

EWA: efficient wiring-sizing algorithm for signal nets and clock nets

Lawrence T. Pileggi, Rony Kay, L. Pileggi, 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Efficient inductance extraction via windowing

Lawrence T. Pileggi, Michael W. Beattie, 2001, DATE '01.

Hierarchical interconnect circuit models

Lawrence T. Pileggi, Michael W. Beattie, Satrajit Gupta, 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

On-chip induction modeling: basics and advanced methods

Lawrence T. Pileggi, Michael W. Beattie, 2002, IEEE Trans. Very Large Scale Integr. Syst..

Accurate passivity-enforced macromodeling for RF circuits via iterative zero/pole update based on measurement data

Lawrence T. Pileggi, Xin Li, Tamal Mukherjee, 2015, The 20th Asia and South Pacific Design Automation Conference.

Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization

Lawrence T. Pileggi, Noel Menezes, Satyamurthy Pullela, 1995, 32nd Design Automation Conference.

Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks

Brian Taylor, Lawrence T. Pileggi, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Modeling magnetic coupling for on-chip interconnect

Lawrence T. Pileggi, Michael W. Beattie, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Automated Testability Enhancements for Logic Brick Libraries

Brian Taylor, Lawrence T. Pileggi, R. D. Blanton, 2008, 2008 Design, Automation and Test in Europe.

Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics

Lawrence T. Pileggi, Anirudh Devgan, Jiayong Le, 2003, ICCAD.

Detecting reliability attacks during split fabrication using test-only BEOL stack

Lawrence T. Pileggi, Kaushik Vaidyanathan, Bishnu P. Das, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

RICE: rapid interconnect circuit evaluation using AWE

Lawrence T. Pileggi, Curtis L. Ratzlaff, L. Pileggi, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Design methodology for IC manufacturability based on regular logic-bricks

Andrzej J. Strojwas, Lawrence T. Pileggi, Vyacheslav Rovner, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Generating sparse partial inductance matrices with guaranteed stability

Lawrence T. Pileggi, Byron Krauter, 1995, ICCAD.

3D DRAM based application specific hardware accelerator for SpMV

Franz Franchetti, Lawrence T. Pileggi, Fazle Sadi, 2016, 2016 IEEE High Performance Extreme Computing Conference (HPEC).

Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing

Lawrence T. Pileggi, Vehbi Calayir, 2015, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Modeling interconnect variability using efficient parametric model order reduction

Sani R. Nassif, Lawrence T. Pileggi, Xin Li, 2005, Design, Automation and Test in Europe.

Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection

Lawrence T. Pileggi, Diana Marculescu, Sebastian Herbert, 2009, ISLPED.

Evaluating RC-interconnect using moment-matching approximations

Lawrence T. Pileggi, Dean P. Neikirk, Nanda Gopal, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

On moment based metrics for optimal termination of transmission line interconnects

Lawrence T. Pileggi, Rohini Gupta, Byron Krauter, 1996, Proceedings of 9th International Conference on VLSI Design.

STAC: statistical timing analysis with correlation

Lawrence T. Pileggi, Xin Li, Jiayong Le, 2004, Proceedings. 41st Design Automation Conference, 2004..

A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS

Aydin Babakhani, Jean-Olivier Plouchart, Alberto Valdes-Garcia, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

Global and local congestion optimization in technology mapping

Davide Pandini, Andrzej J. Strojwas, Lawrence T. Pileggi, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Time-domain simulation of variational interconnect models

Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, 2002, Proceedings International Symposium on Quality Electronic Design.

All-magnetic analog associative memory

Lawrence T. Pileggi, Vehbi Calayir, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

DC parameterized piecewise-function transistor models for bipolar and MOS logic stage delay evaluation

Santanu Dutta, Lawrence T. Pileggi, Douglas R. Holberg, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Design closure (panel session): hope or hype?

Patrick Groeneveld, Lawrence T. Pileggi, Raul Camposano, 2000, DAC.

Oscillatory Neural Networks Based on TMO Nano-Oscillators and Multi-Level RRAM Cells

James A. Bain, Lawrence T. Pileggi, Abhishek A. Sharma, 2015, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Congestion-aware logic synthesis

Davide Pandini, Andrzej J. Strojwas, Lawrence T. Pileggi, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

RC interconnect synthesis-a moment fitting approach

Lawrence T. Pileggi, Noel Menezes, Florentin Dartu, 1994, ICCAD.

Fully-digital oscillatory associative memories enabled by non-volatile logic

Lawrence T. Pileggi, Vehbi Calayir, 2013, The 2013 International Joint Conference on Neural Networks (IJCNN).

Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits

Lawrence T. Pileggi, Xin Li, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Modular, Fabric-Specific Synthesis for Programmable Architectures

Lawrence T. Pileggi, Aneesh Koorapaty, L. Pileggi, 2002, FPL.

The Elmore Delay as a Bound for RC Trees with Generalized Input Signals

Lawrence T. Pileggi, Rohini Gupta, Byron Krauter, 1995, 32nd Design Automation Conference.

Parameterized Macromodeling for Analog System-Level Design Exploration

Jian Wang, Lawrence T. Pileggi, Xin Li, 2007, 2007 44th ACM/IEEE Design Automation Conference.

A frequency separation macromodel for system-level simulation of RF circuits

Xin Li, Yang Xu, Lawrence T. Pileggi, 2003, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..

Algorithm and hardware co-optimized solution for large SpMV problems

Franz Franchetti, Lawrence T. Pileggi, Fazle Sadi, 2017, 2017 IEEE High Performance Extreme Computing Conference (HPEC).

An explicit RC-circuit delay approximation based on the first three moments of the impulse response

Lawrence T. Pileggi, Florentin Dartu, Bogdan Tutuianu, 1996, 33rd Design Automation Conference Proceedings, 1996.

Modeling and analysis of regular symmetrically structured power/ground distribution networks

Lawrence T. Pileggi, Hui Zheng, 2002, DAC '02.

Cost-effective smart memory implementation for parallel backprojection in computed tomography

Franz Franchetti, Lawrence T. Pileggi, Qiuling Zhu, 2012, 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC).

Inductance 101: modeling and extraction

Lawrence T. Pileggi, Michael W. Beattie, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

ChangeDAR: Online Localized Change Detection for Sensor Data on a Graph

Christos Faloutsos, Leman Akoglu, Lawrence T. Pileggi, 2018, CIKM.

IC thermal simulation and modeling via efficient multigrid-based approaches

Lawrence T. Pileggi, Peng Li, Mehdi Asheghi, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Efficient per-nonlinearity distortion analysis for analog and RF circuits

Lawrence T. Pileggi, Peng Li, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

On the stability of moment-matching approximations in asymptotic waveform evaluation

Lawrence T. Pileggi, Seok-Yoon Kim, Nanda Gopal, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

NORM: compact model order reduction of weakly nonlinear systems

Lawrence T. Pileggi, Peng Li, 2003, DAC '03.

Exploiting Combinatorial Redundancy for Offset Calibration in Flash ADCs

Jean-Olivier Plouchart, Lawrence T. Pileggi, Jonathan Proesel, 2011, IEEE Journal of Solid-State Circuits.

Reliable Non-Zero Skew Clock Trees Using Wire Width Optimization

Lawrence T. Pileggi, Noel Menezes, Satyamurthy Pullela, 1993, 30th ACM/IEEE Design Automation Conference.

A behavioral level approach for nonlinear dynamic modeling of voltage-controlled oscillators

Lawrence T. Pileggi, Peng Li, Wanju Chiang, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

Fast, cheap and under control: the next implementation fabric

Lawrence T. Pileggi, Philippe Magarshack, Abbas El Gamal, 2003, DAC '03.

A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits

Yang Xu, Lawrence T. Pileggi, Xin Li, 2003, ICCAD.

Timing metrics for physical design of deep submicron technologies

Lawrence T. Pileggi, L. Pileggi, 1998, ISPD '98.

Overcoming wireload model uncertainty during physical design

Salil Raje, Lawrence T. Pileggi, Padmini Gopalakrishnan, 2001, ISPD '01.

Min/max on-chip inductance models and delay metrics

Lawrence T. Pileggi, Yi-Chang Lu, Mustafa Celik, 2001, DAC '01.

A 69.5 mW 20 GS/s 6b Time-Interleaved ADC With Embedded Time-to-Digital Calibration in 32 nm CMOS SOI

Lawrence T. Pileggi, Vanessa H.-C. Chen, 2014, IEEE Journal of Solid-State Circuits.

Routing architecture exploration for regular fabrics

Andrzej J. Strojwas, Lawrence T. Pileggi, V. Kheterpal, 2004, Proceedings. 41st Design Automation Conference, 2004..

A sparse image method for BEM capacitance extraction

Lawrence T. Pileggi, Yu Xia, Byron Krauter, 1996, DAC '96.

Metrics and bounds for phase delay and signal attenuation in RC(L)clock trees

Lawrence T. Pileggi, Mustafa Celik, L. Pileggi, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Reducing variability in chip-multiprocessors with adaptive body biasing

Lawrence T. Pileggi, Alyssa Bonnoit, 2010, 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED).

Noise macromodel for radio frequency integrated circuits

Xin Li, Yang Xu, Lawrence T. Pileggi, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS

Aydin Babakhani, Jean-Olivier Plouchart, Alberto Valdes-Garcia, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

Asymptotic probability extraction for non-normal distributions of circuit performance

Lawrence T. Pileggi, Xin Li, Padmini Gopalakrishnan, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

Virtual characterization for exhaustive DFM evaluation of logic cell libraries

Mayler G. A. Martins, Samuel Nascimento Pagliarini, Lawrence T. Pileggi, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

CMOS gate delay models for general RLC loading

Lawrence T. Pileggi, Ravishankar Arunachalam, Florentin Dartu, 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

Nonlinear distortion analysis via linear-centric models

Lawrence T. Pileggi, Peng Li, 2003, ASP-DAC '03.

Analog neuromorphic computing enabled by multi-gate programmable resistive devices

Lawrence T. Pileggi, Mohamed Darwish, Jeffrey A. Weldon, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Sub-20 nm design technology co-optimization for standard cell logic

Andrzej J. Strojwas, Lawrence T. Pileggi, Lars Liebmann, 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Design Methodology of Regular Logic Bricks for Robust Integrated Circuits

Lawrence T. Pileggi, Kim Yaw Tong, 2006, 2006 International Conference on Computer Design.

A linear-centric simulation framework for parametric fluctuations

Sani R. Nassif, Lawrence T. Pileggi, Emrah Acar, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits

Jean-Olivier Plouchart, Alberto Valdes-Garcia, Lawrence T. Pileggi, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Architecture-aware FPGA placement using metric embedding

Lawrence T. Pileggi, Xin Li, Padmini Gopalakrishnan, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Post-processing of clock trees via wiresizing and buffering for robust design

Lawrence T. Pileggi, Noel Menezes, Satyamurthy Pullela, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Statistical modeling and post manufacturing configuration for scaled analog CMOS

Lawrence T. Pileggi, Jonathan Proesel, Gökçe Keskin, 2010, IEEE Custom Integrated Circuits Conference 2010.

Robust and passive model order reduction for circuits containing susceptance elements

Lawrence T. Pileggi, Hui Zheng, L. Pileggi, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

Compact reduced-order modeling of weakly nonlinear analog and RF circuits

Lawrence T. Pileggi, Peng Li, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

On-chip inductance models: 3D or not 3D?

Tao Lin, Lawrence T. Pileggi, Michael W. Beattie, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Enabling portable energy efficiency with memory accelerated library

Tze Meng Low, Franz Franchetti, James C. Hoe, 2015, 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

Parasitics extraction with multipole refinement

Lawrence T. Pileggi, Michael W. Beattie, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

AWE macromodels of VLSI interconnect for circuit simulation

Lawrence T. Pileggi, Seok-Yoon Kim, Nanda Gopal, 1992, ICCAD.

Time-domain macromodels for VLSI interconnect analysis

Lawrence T. Pileggi, Seok-Yoon Kim, Nanda Gopal, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Projection-based performance modeling for inter/intra-die variations

Andrzej J. Strojwas, Lawrence T. Pileggi, Xin Li, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Accurate Coupling-centric Timing Analysis Incorporating Temporal and Functional Isolation

Lawrence T. Pileggi, Ravishankar Arunachalam, Ronald DeShawn Blanton, 2002, VLSI Design.

Predicting circuit performance using circuit-level statistical timing analysis

M. Ray Mercer, Lawrence T. Pileggi, Noel Menezes, 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

SRAM parametric failure analysis

Jian Wang, Lawrence T. Pileggi, Xin Li, 2009, 2009 46th ACM/IEEE Design Automation Conference.

Evaluating the benefits of relaxed BEOL pitch for deeply scaled ICs

Samuel Nascimento Pagliarini, Lawrence T. Pileggi, Renzhi Liu, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

Neurocomputing and associative memories based on ovenized aluminum nitride resonators

Gianluca Piazza, Lawrence T. Pileggi, Tom Jackson, 2013, The 2013 International Joint Conference on Neural Networks (IJCNN).

A systems approach to computing in beyond CMOS fabrics

Jan M. Rabaey, Naresh R. Shanbhag, Eric Pop, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

An 8-bit 1.5GS/s flash ADC using post-manufacturing statistical selection

Jean-Olivier Plouchart, Lawrence T. Pileggi, Jonathan Proesel, 2010, IEEE Custom Integrated Circuits Conference 2010.

Calculating worst-case gate delays due to dominant capacitance coupling

Lawrence T. Pileggi, Florentin Dartu, 1997, DAC.

ORACLE: optimization with recourse of analog circuits including layout extraction

Stephen P. Boyd, Yang Xu, Lawrence T. Pileggi, 2004, Proceedings. 41st Design Automation Conference, 2004..

On the design of phase locked loop oscillatory neural networks: Mitigation of transmission delay effects

Soummya Kar, Brian Swenson, Lawrence T. Pileggi, 2016, 2016 International Joint Conference on Neural Networks (IJCNN).

ftd: an exact frequency to time domain conversion for reduced order RLC interconnect models

Ying Liu, Andrzej J. Strojwas, Lawrence T. Pileggi, 1998, DAC.

Impact of Load Models on Power Flow Optimization

Hyun Ah Song, Christos Faloutsos, Lawrence T. Pileggi, 2019, 2019 IEEE Power & Energy Society General Meeting (PESGM).

Model order-reduction of RC(L) interconnect including variational analysis

Ying Liu, Andrzej J. Strojwas, Lawrence T. Pileggi, 1999, DAC '99.

Transmission line synthesis via constrained multivariable optimization

Lawrence T. Pileggi, Rohini Gupta, Byron Krauter, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics

Lawrence T. Pileggi, Herman Schmit, Aneesh Koorapaty, 2003, FPL.

CHIME: coupled hierarchical inductance model evaluation

Lawrence T. Pileggi, Satrajit Gupta, 2004, Proceedings. 41st Design Automation Conference, 2004..

Toward an integrated design methodology for fault-tolerant, multiple clock/voltage integrated systems

Radu Marculescu, Lawrence T. Pileggi, Diana Marculescu, 2004, IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings..

Electrical modeling of integrated-package power and ground distributions

Lawrence T. Pileggi, Hui Zheng, Byron Krauter, 2003, IEEE Design & Test of Computers.

A self-calibrating sense amplifier for a true random number generator using hybrid FinFET-straintronic MTJ

Samuel Nascimento Pagliarini, Lawrence T. Pileggi, Sudipta Bhuin, 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

Heterogeneous programmable logic block architectures

Lawrence T. Pileggi, Herman Schmit, Vikas Chandra, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions

Lawrence T. Pileggi, Xin Li, Jiayong Le, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Analog and RF circuit macromodels for system-level analysis

Xin Li, Yang Xu, Lawrence T. Pileggi, 2003, DAC '03.

ETA: electrical-level timing analysis

M. Ray Mercer, Lawrence T. Pileggi, Douglas R. Holberg, 1992, ICCAD.

Unified power system analyses and models using equivalent circuit formulation

Gabriela Hug, Xin Li, Lawrence T. Pileggi, 2016, 2016 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference (ISGT).

Low-Overhead Self-Healing Methodology for Current Matching in Current-Steering DAC

Lawrence T. Pileggi, Renzhi Liu, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory

Doru-Thom Popovici, Franz Franchetti, James C. Hoe, 2014, 2014 IEEE High Performance Extreme Computing Conference (HPEC).

Steady-state analysis of power system harmonics using equivalent split-circuit models

Gabriela Hug, Xin Li, Lawrence T. Pileggi, 2016, 2016 IEEE PES Innovative Smart Grid Technologies Conference Europe (ISGT-Europe).

An interconnect channel design methodology for high performance integrated circuits

Lawrence T. Pileggi, Herman Schmit, Vikas Chandra, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Toward efficient programming of reconfigurable radio frequency (RF) receivers

Lawrence T. Pileggi, Xin Li, Jun Tao, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Top-down Physical Design of Soft Embedded FPGA Fabrics

Lawrence T. Pileggi, Ken Mai, V. Mohammed Zackriya, 2021, FPGA.

Hardware Redaction via Designer-Directed Fine-Grained eFPGA Insertion

Lawrence T. Pileggi, Ken Mai, Joseph Sweeney, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

22.2 A 69.5mW 20GS/s 6b time-interleaved ADC with embedded time-to-digital calibration in 32nm CMOS SOI

Lawrence T. Pileggi, V. H.-C. Chen, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

RC-interconnect macromodels for timing simulation

Lawrence T. Pileggi, Florentin Dartu, Bogdan Tutuianu, 1996, 33rd Design Automation Conference Proceedings, 1996.

A Phase-Change Via-Reconfigurable CMOS $LC$ VCO

Cheng-Yuan Wen, James A. Bain, Lawrence T. Pileggi, 2013, IEEE Transactions on Electron Devices.