Deborah Dressler

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface

Ting Wu, Manish Jain, Amir Amirkhany, 2012, IEEE Journal of Solid-State Circuits.

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface

Ting Wu, Manish Jain, Amir Amirkhany, 2012, IEEE Journal of Solid-State Circuits.

Challenges in designing high speed memory subsystem for mobile applications

Ming Li, Tsunwai Gary Yip, Deborah Dressler, 2011, 2011 Design, Automation & Test in Europe.

Low power and low EM emission DRAM memory interface for HD video recording in mobile devices

Tsunwai Gary Yip, Brian Tsang, Deborah Dressler, 2010, The 2010 International Conference on Green Circuits and Systems.

An Adaptive Body-Biased Clock Generation System in 28nm CMOS

Nhat Nguyen, Kambiz Kaviani, Roxanne Vu, 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.