Vijay P. Gadde

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface

Ting Wu, Manish Jain, Amir Amirkhany, 2012, IEEE Journal of Solid-State Circuits.

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface

Ting Wu, Manish Jain, Amir Amirkhany, 2012, IEEE Journal of Solid-State Circuits.

A 25 GHz Fast-Lock Digital LC PLL With Multiphase Output Using a Magnetically-Coupled Loop of Oscillators

Jason Wei, Mohammad Hekmat, Reza Navid, 2015, IEEE Journal of Solid-State Circuits.