Chanh Tran

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface

Ting Wu, Manish Jain, Amir Amirkhany, 2012, IEEE Journal of Solid-State Circuits.

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface

Ting Wu, Manish Jain, Amir Amirkhany, 2012, IEEE Journal of Solid-State Circuits.

A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface

Masum Hossain, Jared Zerbe, Barry Daly, 2014, IEEE Journal of Solid-State Circuits.