GreenChip: A tool for evaluating holistic sustainability of modern computing systems

Abstract There is mounting evidence that manufacturing energy and environmental costs are a growing factor in the overall energy footprint of computing systems. The quantification of these impacts requires the evaluation of both the manufacturing and use phase energy/environmental costs of major integrated circuit (IC) components, including processing units, memory, and storage. In particular, expansions of memory and cache can potentially increase manufacturing costs beyond what can be recovered through use phase advantages for reasonable usage patterns. With this holistic view of sustainability in mind, we provide evaluations of the environmental impacts of memory and cache options for Parsec and SPEC multi-program workloads. Using indifference point analysis, we determine which architectural decisions are the most sustainable in the context of these workloads for various usage scenarios. Through a form of break even analysis, we show the impact of upgrading to a new technology node. Our analysis of current processor trends indicates that upgrading may require upwards of 10 years of service time to break even, and that designing systems with smaller cache and main memory sizes may provide an overall positive environmental trend without dramatically reducing performance.

[1]  Hans-Jürgen Dr. Klüppel,et al.  The Revision of ISO Standards 14040-3 - ISO 14040: Environmental management – Life cycle assessment – Principles and framework - ISO 14044: Environmental management – Life cycle assessment – Requirements and guidelines , 2005 .

[2]  Michael J Cullen,et al.  Comparative assessment of life cycle assessment methods used for personal computers. , 2010, Environmental science & technology.

[3]  Mark Neisser,et al.  ITRS lithography roadmap: 2015 challenges , 2015 .

[4]  John L. Henning SPEC CPU2006 benchmark descriptions , 2006, CARN.

[5]  Michael J. Schulte,et al.  A New Era of Performance Evaluation , 2007, Computer.

[6]  John L. Henning SPEC CPU2006 memory footprint , 2007, CARN.

[7]  Alex K. Jones,et al.  “Scaling” the impact of EDA education Preliminary findings from the CCC workshop series on extreme scale design automation , 2013, 2013 IEEE International Conference on Microelectronic Systems Education (MSE).

[8]  Somayeh Sardashti,et al.  The gem5 simulator , 2011, CARN.

[9]  Lieven Eeckhout,et al.  Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation , 2011, 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC).

[10]  Norman P. Jouppi,et al.  WRL Research Report 93/5: An Enhanced Access and Cycle Time Model for On-chip Caches , 1994 .

[11]  Jung Ho Ahn,et al.  McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[12]  Jean-Philippe Laurent,et al.  Development of parametric material, energy, and emission inventories for wafer fabrication in the semiconductor industry. , 2003, Environmental science & technology.

[13]  Bruce Jacob,et al.  DRAMSim2: A Cycle Accurate Memory System Simulator , 2011, IEEE Computer Architecture Letters.

[14]  David H. Bailey,et al.  The Nas Parallel Benchmarks , 1991, Int. J. High Perform. Comput. Appl..

[15]  Jane C. Bare,et al.  TRACI 2.0: the tool for the reduction and assessment of chemical and other environmental impacts 2.0 , 2011 .

[16]  Matthias S. Müller,et al.  SPEC OMP2012 - An Application Benchmark Suite for Parallel Systems Using OpenMP , 2012, IWOMP.

[17]  Sarah Boyd,et al.  Life-Cycle Assessment of Semiconductors , 2011 .

[18]  Jacquetta Lee,et al.  Redefining scope: the true environmental impact of smartphones? , 2015, The International Journal of Life Cycle Assessment.

[19]  Kai Li,et al.  The PARSEC benchmark suite: Characterization and architectural implications , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

[20]  Paul Teehan,et al.  Comparing embodied greenhouse gas emissions of modern computing and electronics products. , 2013, Environmental science & technology.

[21]  Haifeng Xu,et al.  Green computing: A life cycle perspective , 2013, 2013 International Green Computing Conference Proceedings.

[22]  Yiran Chen,et al.  Considering fabrication in sustainable computing , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[23]  E. Antonsson,et al.  USING INDIFFERENCE POINTS IN ENGINEERING DECISIONS , 2000 .