Wireless Interconnects Enabled On-chip Multicast Communication

The ability of multicasting is necessary and useful for Chip Multiprocessors (CMPs) to benefit and implement cache coherence protocols, parallel algorithms, etc. Whereas the design and implementation of high-efficient multicasting in traditional wired Network-on-Chip (NoC) is an arduous task. With the aid of wireless interconnects, not only the bandwidth and latency of NoC can be improved dramatically, but also the inherent broadcast properties of wireless signals can be adopted for multicasting. In this paper, we propose a mesh-like multicast enhancing mechanism based on wireless interconnects. Equipped with 9 wireless transceivers in a traditional 9x9 mesh NoC, this approach realizes a high efficiency, low latency group interconnection. Simulation results show the promising performance boosting of the wireless interconnection.

[1]  Jason Cong,et al.  CMP network-on-chip overlaid with multi-band RF-interconnect , 2008, 2008 IEEE 14th International Symposium on High Performance Computer Architecture.

[2]  W. D. de Heer,et al.  Carbon Nanotubes--the Route Toward Applications , 2002, Science.

[3]  James R. Goodman.  Using cache memory to reduce processor-memory traffic , 1998, ISCA '98.

[4]  Xiaola Lin,et al.  Deadlock-Free Multicast Wormhole Routing in 2-D Mesh Multicomputers , 1994, IEEE Trans. Parallel Distributed Syst..

[5]  Gilbert Hendry,et al.  Tools and methodologies for designing energy-efficient photonic networks-on-chip for highperformance chip multiprocessors , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[6]  P. Cochat,et al.  Et al , 2008, Archives de pediatrie : organe officiel de la Societe francaise de pediatrie.

[7]  Axel Jantsch,et al.  Connection-oriented multicasting in wormhole-switched networks on chip , 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

[8]  B. Floyd,et al.  The projected power consumption of a wireless clock distribution system and comparison to conventional distribution systems , 1999, Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247).

[9]  Peng Liu,et al.  An intra-chip free-space optical interconnect , 2010, ISCA.

[10]  Manfred Glesner,et al.  New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip , 2011, IEEE Transactions on Parallel and Distributed Systems.

[11]  Alberto Ros,et al.  A Direct Coherence Protocol for Many-Core Chip Multiprocessors , 2010, IEEE Transactions on Parallel and Distributed Systems.

[12]  T. Sakurai,et al.  Analysis and design of inductive coupling and transceiver circuit for inductive inter-chip wireless superconnect , 2005, IEEE Journal of Solid-State Circuits.

[13]  D.D. Antono,et al.  1.27Gb/s/pin 3mW/pin wireless superconnect (WSC) interface scheme , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[14]  Yi Wang,et al.  SD-MAC: Design and Synthesis of a Hardware-Efficient Collision-Free QoS-Aware MAC Protocol for Wireless Network-on-Chip , 2008, IEEE Transactions on Computers.

[15]  Manuel P. Malumbres,et al.  An efficient implementation of tree-based multicast routing for distributed shared-memory multiprocessors , 2000, J. Syst. Archit..

[16]  W. Dally,et al.  Route packets, not wires: on-chip interconnection networks , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[17]  Milo M. K. Martin,et al.  Token Coherence: A New Framework for Shared-Memory Multiprocessors , 2003, IEEE Micro.