Statistical Modeling With the PSP MOSFET Model

PSP and the backward propagation of variance (BPV) method are used to characterize the statistical variations of metal-oxide-semiconductor field effect transistors (MOSFETs). BPV statistical modeling of NMOS and PMOS devices is, for the first time, coupled by including self-consistent modeling of ring oscillator gate delays. Parasitic capacitances are included in the analysis. The proposed technique is validated using Monte-Carlo simulations and by comparison to experimental data from two technologies.

[1]  Colin C. McAndrew.  Corrections to "Quadratic Backward Propagation of Variance (QBPV) for Nonlinear Statistical Circuit Modeling" , 2009 .

[2]  G. Gildenblat,et al.  PSP: An advanced surface-potential-based MOSFET model , 2006 .

[3]  Michael Orshansky,et al.  Direct sampling methodology for statistical analysis of scaled CMOS technologies , 1999 .

[4]  G. Gildenblat,et al.  PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation , 2006, IEEE Transactions on Electron Devices.

[5]  James Tschanz,et al.  Parameter variations and impact on circuits and microarchitecture , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[6]  Alan Mathewson,et al.  Relating statistical MOSFET model parameter variabilities to IC manufacturing process fluctuations enabling realistic worst case design , 1994 .

[7]  M.B. Ketchen,et al.  Ring oscillators for CMOS process tuning and variability control , 2006, IEEE Transactions on Semiconductor Manufacturing.

[8]  C. C. McAndrew,et al.  Efficient statistical BJT modeling, why /spl beta/ is more than I/sub c//I/sub b/ , 1997, Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting.

[9]  Colin C. McAndrew,et al.  Statistical modeling for circuit simulation , 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

[10]  James D. Meindl,et al.  Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration , 2002, IEEE J. Solid State Circuits.

[11]  S.S. Mahant-Shetti,et al.  Statistical Modeling for Efficient Parametric Yield Estimation of MOS VLSI Circuits , 1985, IEEE Journal of Solid-State Circuits.

[12]  G.D.J. Smit,et al.  The Physical Background of JUNCAP2 , 2006, IEEE Transactions on Electron Devices.

[13]  C. Y. Chen,et al.  Mismatch Characterization of Ring Oscillators , 2007, 2007 IEEE Custom Integrated Circuits Conference.

[14]  Ieee Circuits,et al.  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems information for authors , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[15]  C. C. McAndrew,et al.  Understanding MOSFET mismatch for analog design , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[16]  Colin C. McAndrew,et al.  Device Correlation: Modeling using Uncorrelated Parameters, Characterization Using Ratios and Differences , 2006 .

[17]  Lawrence T. Pileggi,et al.  Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[18]  Sani R. Nassif,et al.  Modeling and analysis of manufacturing variations , 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

[19]  Colin C. McAndrew,et al.  Quadratic Backward Propagation of Variance for Nonlinear Statistical Circuit Modeling , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.