Specifying User Preferences using Weighted Signal Temporal Logic

We extend Signal Temporal Logic (STL) to enable the specification of importance and priorities. The extension, called Weighted STL (wSTL), has the same qualitative (Boolean) semantics as STL, but additionally defines weights associated with Boolean and temporal operators that modulate its quantitative semantics (robustness). We show that the robustness of wSTL can be defined as weighted generalizations of all known compatible robustness functionals (i.e., robustness scores that are recursively defined over formulae) that can take into account the weights in wSTL formulae. We utilize this weighted robustness to distinguish signals with respect to a desired wSTL formula that has sub-formulae with different importance or priorities and time preferences, and demonstrate its usefulness in problems with conflicting tasks where satisfaction of all tasks cannot be achieved. We also employ wSTL robustness in an optimization framework to synthesize controllers that maximize satisfaction of a specification with user specified preferences.

[1]  Dimos V. Dimarogonas,et al.  Robust control for signal temporal logic specifications using discrete average space robustness , 2019, Autom..

[2]  Hai Lin,et al.  A Smooth Robustness Measure of Signal Temporal Logic for Symbolic Control , 2020, IEEE Control Systems Letters.

[3]  A. Agung Julius,et al.  An MILP approach for real-time optimal controller synthesis with Metric Temporal Logic specifications , 2016, 2016 American Control Conference (ACC).

[4]  Paulo Tabuada,et al.  Verification and Control of Hybrid Systems - A Symbolic Approach , 2009 .

[5]  Dejan Nickovic,et al.  Monitoring Temporal Properties of Continuous Signals , 2004, FORMATS/FTRTFT.

[6]  Paulo Tabuada,et al.  Robust Linear Temporal Logic , 2015, CSL.

[7]  Calin Belta,et al.  Time window temporal logic , 2017, Theor. Comput. Sci..

[8]  Calin Belta,et al.  Minimum-violation scLTL motion planning for mobility-on-demand , 2017, 2017 IEEE International Conference on Robotics and Automation (ICRA).

[9]  Calin Belta,et al.  Average-based Robustness for Continuous-Time Signal Temporal Logic , 2019, 2019 IEEE 58th Conference on Decision and Control (CDC).

[10]  Emilio Frazzoli,et al.  Minimum-violation LTL planning with conflicting specifications , 2013, 2013 American Control Conference.

[11]  Alberto L. Sangiovanni-Vincentelli,et al.  Model predictive control with signal temporal logic specifications , 2014, 53rd IEEE Conference on Decision and Control.

[12]  Calin Belta,et al.  Formal Methods for Control Synthesis: An Optimization Perspective , 2019, Annu. Rev. Control. Robotics Auton. Syst..

[13]  Thomas A. Henzinger,et al.  Hybrid systems III : verification and control , 1996 .

[14]  Georgios E. Fainekos,et al.  Mining parametric temporal logic properties in model-based design for cyber-physical systems , 2015, International Journal on Software Tools for Technology Transfer.

[15]  Dimos V. Dimarogonas,et al.  On Robustness Metrics for Learning STL Tasks , 2020, 2020 American Control Conference (ACC).

[16]  Calin Belta,et al.  Control from Signal Temporal Logic Specifications with Smooth Cumulative Quantitative Semantics , 2019, 2019 IEEE 58th Conference on Decision and Control (CDC).

[17]  Ufuk Topcu,et al.  Maximum Realizability for Linear Temporal Logic Specifications , 2018, ATVA.

[18]  Houssam Abbas,et al.  Smooth operator: Control using the smooth robustness of temporal logic , 2017, 2017 IEEE Conference on Control Technology and Applications (CCTA).

[19]  Calin Belta,et al.  Arithmetic-Geometric Mean Robustness for Control from Signal Temporal Logic Specifications , 2019, 2019 American Control Conference (ACC).

[20]  Dimitri P. Bertsekas,et al.  Nonlinear Programming , 1997 .

[21]  Christel Baier,et al.  Principles of model checking , 2008 .

[22]  Calin Belta,et al.  Spatial-Temporal pattern Synthesis in a Network of Locally Interacting Cells , 2018, 2018 IEEE Conference on Decision and Control (CDC).

[23]  Oded Maler,et al.  Robust Satisfaction of Temporal Logic over Real-Valued Signals , 2010, FORMATS.