An algorithm for identifying and selecting the primed implicants of a multiple-output Boolean function

A multiple-output Boolean minimization procedure is presented that generates a minimum cover with computational efficiency by extending the directed search algorithm to the multiple-output case. This procedure is applicable to manual execution as well as to automated execution, and to both conventional two-level gating structures and programmable logic arrays (PLAs). >

[1]  M. Karnaugh.  The map method for synthesis of combinational logic circuits , 1953, Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics.

[2]  V. Thomas Rhyne,et al.  Fundamentals of digital systems design , 1973 .

[3]  Sureshchander.  Minimization of Switching Functions—A Fast Technique , 1975, IEEE Transactions on Computers.

[4]  Sharon Ruth Perkins.  Simplification of multiple-output Boolean functions using an extension of the directed search algorithm , 1980 .

[5]  Udo W. Pooch,et al.  A New Technique for the Fast Minimization of Switching Functions , 1977, IEEE Transactions on Computers.

[6]  Willard Van Orman Quine,et al.  A Way to Simplify Truth Functions , 1955 .

[7]  Alphonso Gar-Yau Soong.  An Algorithm for Minimizing Programmable Logic Array Realizations , 1977 .

[8]  Bernd Reusch,et al.  Generation of Prime Implicants from Subfunctions and a Unifying Approach to the Covering Problem , 1975, IEEE Transactions on Computers.

[9]  J. Roth.  Algebraic topological methods for the synthesis of switching systems. I , 1958 .

[10]  Alan Natapoff.  Irreducible Topological Components of an Arbitrary Boolean Truth Function and Generation of Their Minimal Coverings , 1967, JACM.

[11]  Bernie L. Hulme,et al.  A Prime Implicant Algorithm with Factoring , 1975, IEEE Transactions on Computers.

[12]  Michel Dagenais,et al.  McBOOLE: A New Procedure for Exact Logic Minimization , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  Paul T. Hulina,et al.  Generation of Prime Implicants by Direct Multiplication , 1971, IEEE Transactions on Computers.

[14]  Arthur D. Friedman,et al.  Logical design of digital systems , 1975 .

[15]  Pierre L. Tison,et al.  Generalization of Consensus Theory and Application to the Minimization of Boolean Functions , 1967, IEEE Trans. Electron. Comput..

[16]  J. Paul Roth,et al.  Programmed Logic Array Optimization , 1978, IEEE Transactions on Computers.

[17]  Saburo Muroga,et al.  Logic design and switching theory , 1979 .

[18]  Douglas W. Brown,et al.  A State-Machine Synthesizer -- SMS , 1981, 18th Design Automation Conference.

[19]  Jr. Melvin Howard Mckinney.  A directed search algorithm for the canonical minimization of switching-functions. , 1974 .

[20]  Daniel L. Ostapko,et al.  MINI: A Heuristic Approach for Logic Minimization , 1974, IBM J. Res. Dev..

[21]  Richard C. T. Lee,et al.  A New Algorithm for Generating Prime Implicants , 1970, IEEE Transactions on Computers.

[22]  Antonin Svoboda.  Ordering of Implicants , 1967, IEEE Trans. Electron. Comput..

[23]  E. McCluskey.  Minimization of Boolean functions , 1956 .

[24]  H. R. Hwa,et al.  A Method for Generating Prime Implicants of a Boolean Expression , 1974, IEEE Transactions on Computers.

[25]  Zosimo Arevalo,et al.  A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays , 1978, IEEE Transactions on Computers.

[26]  J. David Irwin,et al.  An Introduction to Computer Logic , 1974 .