Implicit Representation of Discrete Objects
暂无分享,去创建一个
[1] Maciej J. Ciesielski,et al. BDD decomposition for efficient logic synthesis , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).
[2] Input don't care sequences in FSM networks , 1993, ICCAD '93.
[3] Sarma B. K. Vrudhula,et al. BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis , 1993, 30th ACM/IEEE Design Automation Conference.
[4] Marek A. Perkowski,et al. New multivalued functional decomposition algorithms based on MDDs , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[5] Eduard Cerny,et al. An Approach to Unified Methodology of Combinational Switching Circuits , 1977, IEEE Transactions on Computers.
[6] Randal E. Bryant,et al. Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.
[7] Massoud Pedram,et al. OBDD-based function decomposition: algorithms and implementation , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[8] Olivier Coudert,et al. Implicit and incremental computation of primes and essential primes of Boolean functions , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[9] J. Hartmanis,et al. Algebraic Structure Theory Of Sequential Machines , 1966 .
[10] Malgorzata Marek-Sadowska,et al. Cube diagram bundles: a new representation of strongly unspecified multiple-valued functions and relations , 1997, Proceedings 1997 27th International Symposium on Multiple- Valued Logic.
[11] Tiziano Villa,et al. A Fully Implicit Algorithm for Exact State Minimization , 1994, 31st Design Automation Conference.
[12] Robert K. Brayton,et al. Logic Minimization Algorithms for VLSI Synthesis , 1984, The Kluwer International Series in Engineering and Computer Science.
[13] Robert K. Brayton,et al. Implicit state enumeration of finite state machines using BDD's , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[14] Maurizio Damiani,et al. The state reduction of nondeterministic finite-state machines , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[15] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[16] Sarma Vrudhula,et al. EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[17] Marek A. Perkowski,et al. Labeled rough partitions - a new general purpose representation for multiple-valued functions and relations , 2001, J. Syst. Archit..
[18] Alan Mishchenko,et al. Implicit Algorithms for Multi-Valued Input Support Manipulation , 2001 .
[19] C. Y. Lee. Representation of switching circuits by binary-decision programs , 1959 .
[20] Olivier Coudert,et al. Two-level logic minimization: an overview , 1994, Integr..
[21] Fabio Somenzi,et al. Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[22] Saburo Muroga,et al. Binary Decision Diagrams , 2000, The VLSI Handbook.
[23] Lech Józwiak,et al. Information relationships and measures: an analysis apparatus for efficient information system synthesis , 1997, EUROMICRO 97. Proceedings of the 23rd EUROMICRO Conference: New Frontiers of Information Technology (Cat. No.97TB100167).
[24] Sheldon B. Akers,et al. Binary Decision Diagrams , 1978, IEEE Transactions on Computers.
[25] Robert K. Brayton,et al. Permissible Observability Relations in FSM Networks , 1994, 31st Design Automation Conference.