Energy efficient scheduling for web search on heterogeneous microservers

Heterogeneous multi-core processors, such as the ARM big-LITTLE architecture, are becoming increasingly popular due to power and thermal constraints. In this paper, we address the use of low-power heterogeneous multi-cores as microservers utilizing web search as a motivational application. In particular, we propose a new family of scheduling policies for heterogeneous microservers to optimize for performance metrics such as mean response time and service level agreements, while guaranteeing thermally-safe operation. Thorough experimental evaluations on a big-LITTLE platform demonstrate that naive performance-oriented scheduling policies quickly result in thermal instability, while the proposed policies not only reduce peak temperature but also achieve 4.8× reduction in processing time and 5.6× increase in energy efficiency compared to baseline scheduling policies.

[1]  Ripal Nathuji,et al.  Analyzing performance asymmetric multicore processors for latency sensitive datacenter applications , 2010 .

[2]  Norman P. Jouppi,et al.  Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction , 2003, MICRO.

[3]  Ümit Y. Ogras,et al.  Predictive dynamic thermal and power management for heterogeneous mobile platforms , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[4]  Stacey Jeffery,et al.  HASS: a scheduler for heterogeneous multicore systems , 2009, OPSR.

[5]  Karthikeyan Sankaralingam,et al.  Dark silicon and the end of multicore scaling , 2011, 2011 38th Annual International Symposium on Computer Architecture (ISCA).

[6]  Benjamin C. Lee,et al.  Navigating heterogeneous processors with market mechanisms , 2013, 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA).

[7]  Norman P. Jouppi,et al.  Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..

[8]  Dheeraj Reddy,et al.  Bias scheduling in heterogeneous multi-core architectures , 2010, EuroSys '10.

[9]  Shreyas Sundaram,et al.  Robust heterogeneous data center design: a principled approach , 2011, PERV.

[10]  Christina Delimitrou,et al.  Paragon: QoS-aware scheduling for heterogeneous datacenters , 2013, ASPLOS '13.

[11]  Benjamin C. Lee,et al.  Understanding query complexity and its implications for energy-efficient web search , 2013, ISLPED '13.

[12]  Muhammad Shafique,et al.  Power management for mobile games on asymmetric multi-cores , 2015, 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

[13]  Vanchinathan Venkataramani,et al.  Power-performance modeling on asymmetric multi-cores , 2013, 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

[14]  Siddharth Garg,et al.  Job arrival rate aware scheduling for asymmetric multi-core servers in the dark silicon era , 2014, 2014 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[15]  P. R. Kumar,et al.  Optimal control of a queueing system with two heterogeneous servers , 1984 .

[16]  Archana Ganapathi,et al.  The Case for Evaluating MapReduce Performance Using Workload Suites , 2011, 2011 IEEE 19th Annual International Symposium on Modelling, Analysis, and Simulation of Computer and Telecommunication Systems.

[17]  Kushagra Vaid,et al.  Web search using mobile cores: quantifying and mitigating the price of efficiency , 2010, ISCA.

[18]  Anthony Ephremides,et al.  Extension of the optimality of the threshold policy in heterogeneous multiserver queueing systems , 1988 .

[19]  Vijay Janapa Reddi,et al.  High-performance and energy-efficient mobile web browsing on big/little systems , 2013, 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA).

[20]  Vanchinathan Venkataramani,et al.  Hierarchical power management for asymmetric multi-core in dark silicon era , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[21]  Karthikeyan Sankaralingam,et al.  Dark Silicon and the End of Multicore Scaling , 2012, IEEE Micro.

[22]  Patrick Crowley,et al.  Dynamic thread assignment on heterogeneous multiprocessor architectures , 2006, CF '06.