An automatic test pattern generation framework for combinational threshold logic networks

We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanotechnologies, such as resonant tunneling diodes (RTDs) and quantum cellular automata (QCA), implement threshold logic. Consequently, there is a need to develop an ATPG methodology for this type of logic. We have built the first automatic test pattern generator and fault simulator for threshold logic, which has been integrated on top of an existing computer-aided design (CAD) tool. These exploit new fault collapsing techniques we have developed for threshold networks. We perform fault modeling to show that many cuts and shorts in RTD-based threshold gates are equivalent to stuck-at faults at the inputs and output of the gate. Experimental results with the MCNC benchmarks indicate that test vectors were found for all testable stuck-at faults in their threshold network implementations.

[1]  Saburo Muroga,et al.  Threshold logic and its applications , 1971 .

[2]  D.P. Siewiorek,et al.  Testing of digital systems , 1981, Proceedings of the IEEE.

[3]  K. Maezawa,et al.  InP-based high-performance monostable-bistable transition logic elements (MOBILEs) using integrated multiple-input resonant-tunneling devices , 1996, IEEE Electron Device Letters.

[4]  Werner Prost,et al.  Threshold logic circuit design of parallel adders using resonant tunneling devices , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[5]  Robert K. Brayton,et al.  Sequential circuit design using synthesis and optimization , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[6]  Rui Zhang,et al.  Synthesis and optimization of threshold logic networks with application to nanotechnologies , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[7]  K. Maezawa,et al.  High-speed and low-power operation of a resonant tunneling logic gate MOBILE , 1998, IEEE Electron Device Letters.

[8]  Karl Goser,et al.  Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes , 2000, Int. J. Circuit Theory Appl..

[9]  Valeriu Beiu,et al.  VLSI implementations of threshold logic-a comprehensive survey , 2003, IEEE Trans. Neural Networks.

[10]  Karl Goser,et al.  Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes , 2000 .