A low cost, high performance dynamic-programming-based adaptive power allocation scheme for many-core architectures in the dark silicon era

Power consumption of many-core chips increases in such a rapid pace that it will soon exceed the chip's affordable power budget. As a result, design of a many-core chip has to address a significant performance challenge under a tight power budget constraint. This problem becomes more prevalent as more of the frequencies and/or voltages of on-chip resources in a many-core chip can be tuned, where heuristics based power allocation approaches often lead to poor performance. Another important problem is that the input power budget of a many-core chip might actually undergo a rapid change at run time. In this paper, the performance optimization problem is formally formulated, and an Optimal Power Allocation method using Dynamic programming (OPAD) is proposed to solve this problem. OPAD has a linear time complexity, and it is quite scalable to the problem size. Extensive experimental results have confirmed lower application execution time of OPAD than that of other competing power allocation methods, i.e., 20%~30% reduction in applications' execution time over three competing methods. The runtime and hardware overhead of OPAD are also shown to be very small, making it suitable for adaptive power allocation in future many-core systems.

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