Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits
暂无分享,去创建一个
Jie-Hong Roland Jiang | Nian-Ze Lee | Yi-Hsiang Lai | Hao-Yuan Kuo | J. H. Jiang | Nian-Ze Lee | Yi-Hsiang Lai | Hao-Yuan Kuo
[1] G. S. Tseitin. On the Complexity of Derivation in Propositional Calculus , 1983 .
[2] Ronald L. Rivest,et al. Introduction to Algorithms, third edition , 2009 .
[3] Spyros Tragoudas,et al. Improved Threshold Logic Synthesis Using Implicant-Implicit Algorithms , 2014, ACM J. Emerg. Technol. Comput. Syst..
[4] Alan Mishchenko,et al. Threshold logic synthesis based on cut pruning , 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[5] Michael S. Hsiao,et al. SAT-based equivalence checking of threshold logic designs for nanotechnologies , 2008, GLSVLSI '08.
[6] Valeriu Beiu,et al. VLSI implementations of threshold logic-a comprehensive survey , 2003, IEEE Trans. Neural Networks.
[7] Andrew S. Cassidy,et al. A million spiking-neuron integrated circuit with a scalable communication network and interface , 2014, Science.
[8] Henrik Reif Andersen,et al. Equivalence checking of combinational circuits using Boolean expression diagrams , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[9] Yung-Chih Chen,et al. Fast synthesis of threshold logic networks with optimization , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).
[10] Chee Kheong Siew,et al. Can threshold networks be trained directly? , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[11] Leonardo Franco,et al. A New Decomposition Algorithm for Threshold Synthesis and Generalization of Boolean Functions , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[12] T. Gowda,et al. Synthesis of threshold logic circuits using tree matching , 2007, 2007 18th European Conference on Circuit Theory and Design.
[13] D. B. Strukov,et al. Programmable CMOS/Memristor Threshold Logic , 2013, IEEE Transactions on Nanotechnology.
[14] Spyros Tragoudas,et al. An efficient heuristic to identify threshold logic functions , 2012, JETC.
[15] Saburo Muroga,et al. Threshold logic and its applications , 1971 .
[16] Chun-Yao Wang,et al. On rewiring and simplification for canonicity in threshold logic circuits , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[17] Geoffrey E. Hinton,et al. ImageNet classification with deep convolutional neural networks , 2012, Commun. ACM.
[18] Rui Zhang,et al. Synthesis and optimization of threshold logic networks with application to nanotechnologies , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[19] R. Lippmann,et al. An introduction to computing with neural nets , 1987, IEEE ASSP Magazine.
[20] Sarma B. K. Vrudhula,et al. Combinational equivalence checking for threshold logic circuits , 2007, GLSVLSI '07.
[21] Sarma B. K. Vrudhula,et al. Spintronic Threshold Logic Array (STLA) - a compact, low leakage, non-volatile gate array architecture , 2012, 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).
[22] P. R. Stephan,et al. SIS : A System for Sequential Circuit Synthesis , 1992 .
[23] Xin-She Yang,et al. Introduction to Algorithms , 2021, Nature-Inspired Optimization Algorithms.