Techniques of BDD/ZDD: Brief History and Recent Activity
暂无分享,去创建一个
[1] Olivier Coudert,et al. A unified framework for the formal verification of sequential circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[2] Masahiro Fujita,et al. Symbolic model checking using SAT procedures instead of BDDs , 1999, DAC '99.
[3] Shuzo Yajima,et al. The Complexity of the Optimal Variable Ordering Problems of Shared Binary Decision Diagrams , 1993, ISAAC.
[4] Hiroshi Imai,et al. Computing the Tutte Polynomial of a Graph of Moderate Size , 1995, ISAAC.
[5] Richard Rudell. Dynamic variable ordering for ordered binary decision diagrams , 1993, ICCAD.
[6] Ken Satoh,et al. Compiling Bayesian Networks by Symbolic Probability Calculation Based on Zero-Suppressed BDDs , 2007, IJCAI.
[7] Shin-ichi Minato. Overview of ERATO Minato Project: The Art of Discrete Structure Manipulation between Science and Engineering , 2011, New Generation Computing.
[8] Shin-ichi Minato. πDD: A New Decision Diagram for Efficient Problem Solving in Permutation Space , 2011, SAT.
[9] Shin-ichi Minato,et al. VSOP (Valued-Sum-of-Products) Calculator for Knowledge Processing Based on Zero-Suppressed BDDs , 2005, Federation over the Web.
[10] Albert R. Wang,et al. Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[11] Saburo Muroga,et al. Binary Decision Diagrams , 2000, The VLSI Handbook.
[12] Joao Marques-Silva,et al. GRASP-A new search algorithm for satisfiability , 1996, Proceedings of International Conference on Computer Aided Design.
[13] Sérgio Vale Aguiar Campos,et al. Symbolic Model Checking , 1993, CAV.
[14] Masahiro Fujita,et al. Multi-level logic optimization using binary decision diagrams , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[15] D. Michael Miller,et al. DDMF: An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction , 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[16] Rolf Drechsler,et al. Fast exact minimization of BDDs , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).
[17] D. Welsh. Complexity: Knots, Colourings and Counting: Link polynomials and the Tait conjectures , 1993 .
[18] Taisuke Sato,et al. Propositionalizing the EM algorithm by BDDs , 2010 .
[19] Hiroki Arimura,et al. Notes on Sequence Binary Decision Diagrams: Relationship to Acyclic Automata and Complexities of Binary Set Operations , 2011, Stringology.
[20] Makoto Yokoo,et al. A Compact Representation Scheme of Coalitional Games Based on Multi-Terminal Zero-Suppressed Binary Decision Diagrams , 2011, PRIMA.
[21] Ryo Yoshinaka,et al. Loss Minimization of Power Distribution Networks with Guaranteed Error Bound , 2012 .
[22] Sharad Malik,et al. Chaff: engineering an efficient SAT solver , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[23] Hiroshi G. Okuno,et al. On the Properties of Combination Set Operations , 1998, Inf. Process. Lett..
[24] Nicolas Spyratos,et al. Federation over the Web - International Workshop, Dagstuhl Castle, Germany, May 1-6, 2005. Revised Selected Papers , 2010, Federation over the Web.
[25] Hiroki Arimura,et al. Counterexamples to the long-standing conjecture on the complexity of BDD binary operations , 2012, Inf. Process. Lett..
[26] Olivier Coudert,et al. Implicit and incremental computation of primes and essential primes of Boolean functions , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[27] Robert Wille,et al. Using πDDs in the Design of Reversible Circuits , 2012, RC.
[28] James Bailey,et al. Fast mining of high dimensional expressive contrast patterns using zero-suppressed binary decision diagrams , 2006, KDD '06.
[29] Satoru Iwata,et al. Combinatorial and Geometric Approaches to Counting Problems on Linear Matroids, Graphic Arrangements, and Partial Orders , 1996, COCOON.
[30] Shin-ichi Minato,et al. Zero-Suppressed BDDs for Set Manipulation in Combinatorial Problems , 1993, 30th ACM/IEEE Design Automation Conference.
[31] Edmund M. Clarke,et al. Sequential circuit verification using symbolic model checking , 1991, DAC '90.
[32] Nagisa Ishiura,et al. Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.
[33] Ryo Yoshinaka,et al. Finding All Solutions and Instances of Numberlink and Slitherlink by ZDDs , 2012, Algorithms.
[34] Alistair Moffat,et al. Algorithms and Computations , 1995, Lecture Notes in Computer Science.
[35] N. J. A. Sloane,et al. The On-Line Encyclopedia of Integer Sequences , 2003, Electron. J. Comb..
[36] O. Coudert,et al. Towards an Interactive Fault Tree Analyser , 2011 .
[37] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[38] Shin-ichi Minato,et al. Zero-suppressed BDDs and their applications , 2001, International Journal on Software Tools for Technology Transfer.
[39] Donald E. Knuth,et al. The Art of Computer Programming, Volume 4, Fascicle 2: Generating All Tuples and Permutations (Art of Computer Programming) , 2005 .
[40] Masahiro Fujita,et al. On variable ordering of binary decision diagrams for the application of multi-level logic synthesis , 1991, Proceedings of the European Conference on Design Automation..
[41] Olivier Coudert,et al. Solving graph optimization problems with ZBDDs , 1997, Proceedings European Design and Test Conference. ED & TC 97.
[42] James Bailey,et al. A binary decision diagram based approach for mining frequent subsequences , 2010, Knowledge and Information Systems.
[43] Masahiro Fujita,et al. Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[44] Olivier Coudert,et al. A Logically Complete Reasoning Maintenance System Based on a Logical Constraint Solver , 1991, IJCAI.
[45] Hiroki Arimura,et al. LCM over ZBDDs: Fast Generation of Very Large-Scale Frequent Itemsets Using a Compact Graph-Based Representation , 2008, PAKDD.
[46] Adnan Darwiche,et al. Proceedings of the Twenty-Second International Joint Conference on Artificial Intelligence SDD: A New Canonical Representation of Propositional Knowledge Bases , 2022 .
[47] Randal E. Bryant,et al. Efficient implementation of a BDD package , 1991, DAC '90.