High-Density Image Storage Using Approximate Memory Cells

This paper proposes tailoring image encoding for an approximate storage substrate. We demonstrate that indiscriminately storing encoded images in approximate memory generates unacceptable and uncontrollable quality degradation. The key finding is that errors in the encoded bit streams have non-uniform impact on the decoded image quality. We develop a methodology to determine the relative importance of encoded bits and store them in an approximate storage substrate. The storage cells are optimized to reduce error rate via biasing and are tuned to meet the desired reliability requirement via selective error correction. In a case study with the progressive transform codec (PTC), a precursor to JPEG XR, the proposed approximate image storage system exhibits a 2.7x increase in density of pixels per silicon volume under bounded error rates, and this achievement is additive to the storage savings of PTC compression.

[1]  D. Ielmini,et al.  Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation , 2007, 2007 IEEE International Electron Devices Meeting.

[2]  Guido Torelli,et al.  A Bipolar-Selected Phase Change Memory Featuring Multi-Level Cell Storage , 2009, IEEE Journal of Solid-State Circuits.

[3]  Ajay Luthra,et al.  Overview of the H.264/AVC video coding standard , 2003, IEEE Trans. Circuits Syst. Video Technol..

[4]  Savita S. Jadhav,et al.  JPEG XR an Image Coding Standard , 2012 .

[5]  Michael Gastpar,et al.  To code, or not to code: lossy source-channel communication revisited , 2003, IEEE Trans. Inf. Theory.

[6]  Henrique S. Malvar Fast progressive image coding without wavelets , 2000, Proceedings DCC 2000. Data Compression Conference.

[7]  A. Robert Calderbank,et al.  Coset coding to extend the lifetime of memory , 2013, 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA).

[8]  Takao Onoye,et al.  A low-complexity FEC assignment scheme for motion JPEG2000 over wireless network , 2006, IEEE Transactions on Consumer Electronics.

[9]  Y.C. Chen,et al.  Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory , 2007, 2007 IEEE International Electron Devices Meeting.

[10]  Daniel E. Holcomb,et al.  QBF-Based Synthesis of Optimal Word-Splitting in Approximate Multi-Level Storage Cells , 2014 .

[11]  Henrique S. Malvar Adaptive run-length/Golomb-Rice encoding of quantized generalized Gaussian sources with unknown statistics , 2006, Data Compression Conference (DCC'06).

[12]  Moinuddin K. Qureshi Pay-As-You-Go: Low-overhead hard-error correction for phase change memories , 2011, 2011 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[13]  Paul H. Siegel,et al.  Characterization and error-correcting codes for TLC flash memories , 2012, 2012 International Conference on Computing, Networking and Communications (ICNC).

[14]  Tao Li,et al.  Helmet: A resistance drift resilient architecture for multi-level cell phase change memory system , 2011, 2011 IEEE/IFIP 41st International Conference on Dependable Systems & Networks (DSN).

[15]  Onur Mutlu,et al.  Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[16]  Norman P. Jouppi,et al.  Practical nonvolatile multilevel-cell phase change memory , 2013, 2013 SC - International Conference for High Performance Computing, Networking, Storage and Analysis (SC).

[17]  Karin Strauss,et al.  Zombie memory: Extending memory lifetime by reviving dead blocks , 2013, ISCA.

[18]  Sergio Verdú,et al.  The source-channel separation theorem revisited , 1995, IEEE Trans. Inf. Theory.

[19]  Hsien-Hsin S. Lee,et al.  Tri-level-cell phase change memory: toward an efficient and reliable memory system , 2013, ISCA.

[20]  Joan L. Mitchell,et al.  JPEG: Still Image Data Compression Standard , 1992 .

[21]  Jay W. Schwartz,et al.  Bit-Plane Encoding: A Technique for Source Encoding , 1966, IEEE Transactions on Aerospace and Electronic Systems.

[22]  Haralampos Pozidis,et al.  Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures , 2015, 2015 IEEE International Reliability Physics Symposium.

[23]  Michael Gastpar,et al.  Source-Channel Communication in Sensor Networks , 2003, IPSN.

[24]  J. Kessenich,et al.  Bit error rate in NAND Flash memories , 2008, 2008 IEEE International Reliability Physics Symposium.

[25]  Henrique S. Malvar,et al.  Signal processing with lapped transforms , 1992 .

[26]  W. C. Chien,et al.  Greater than 2-bits/cell MLC storage for ultra high density phase change memory using a novel sensing scheme , 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

[27]  Fabrizio Frescura,et al.  JPEG2000 and MJPEG2000 transmission in 802.11 wireless local area networks , 2003, IEEE Trans. Consumer Electron..

[28]  Haralampos Pozidis,et al.  Programming algorithms for multilevel phase-change memory , 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

[29]  Katharine Treadway The Code , 1873, The New England journal of medicine.

[30]  F. Dufaux,et al.  The JPEG XR image coding standard [Standards in a Nutshell] , 2009, IEEE Signal Processing Magazine.

[31]  Norman P. Jouppi,et al.  FREE-p: Protecting non-volatile memory against both hard and soft errors , 2011, 2011 IEEE 17th International Symposium on High Performance Computer Architecture.

[32]  Henrique S. Malvar Fast progressive wavelet coding , 1999, Proceedings DCC'99 Data Compression Conference (Cat. No. PR00096).

[33]  D. Ielmini,et al.  Recovery and Drift Dynamics of Resistance and Threshold Voltages in Phase-Change Memories , 2007, IEEE Transactions on Electron Devices.

[34]  Vijayalakshmi Srinivasan,et al.  Efficient scrub mechanisms for error-prone emerging memories , 2012, IEEE International Symposium on High-Performance Comp Architecture.

[35]  Moinuddin K. Qureshi,et al.  Morphable memory system: a robust architecture for exploiting multi-level phase change memories , 2010, ISCA.

[36]  Wei Xu,et al.  A Time-Aware Fault Tolerance Scheme to Improve Reliability of Multilevel Phase-Change Memory in the Presence of Significant Resistance Drift , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[37]  Frederic Sala,et al.  Dynamic Threshold Schemes for Multi-Level Non-Volatile Memories , 2012, IEEE Transactions on Communications.