A Survey of On-Chip Optical Interconnects

Numerous challenges present themselves when scaling traditional on-chip electrical networks to large manycore processors. Some of these challenges include high latency, limitations on bandwidth, and power consumption. Researchers have therefore been looking for alternatives. As a result, on-chip nanophotonics has emerged as a strong substitute for traditional electrical NoCs. As of 2017, on-chip optical networks have moved out of textbooks and found commercial applicability in short-haul networks such as links between servers on the same rack or between two components on the motherboard. It is widely acknowledged that in the near future, optical technologies will move beyond research prototypes and find their way into the chip. Optical networks already feature in the roadmaps of major processor manufacturers and most on-chip optical devices are beginning to show signs of maturity. This article is designed to provide a survey of on-chip optical technologies covering the basic physics underlying the operation of optical technologies, optical devices, popular architectures, power reduction techniques, and applications. The aim of this survey article is to start from the fundamental concepts and move on to the latest in the field of on-chip optical interconnects.